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| 11:18.25 | quitte | just to make sure i don't have a grave misunderstanding at this point: once glamo is up and running putting a bitmap on the display consists of nothing else but writing the bitmap data to the framebuffer memory region of the glamo? in the case of glamo with mmio the framebuffer _is_ a memory region? |
| 11:20.25 | larsc | it is a memory mapped region yes |
| 11:21.49 | larsc | the glamo is connected to the SoCs external memory bus |
| 11:26.54 | quitte | ok. great. any idea if the glamo memory is accesible by the glamo core and the host bus at the same time? |
| 11:28.33 | DocScrutinizer | nope it isn't |
| 11:28.35 | larsc | the glamo has two ram banks |
| 11:29.04 | DocScrutinizer | well, larsc for sure knows better detail |
| 11:29.23 | larsc | iirc you can access one at the same from the host and glamo, but you can acess one from the host and one from the glamo core |
| 11:29.30 | larsc | iirc you can't |
| 11:29.50 | DocScrutinizer | makes sense |
| 11:30.51 | quitte | which access takes preference? |
| 11:31.26 | DocScrutinizer | but then one of both needs to be accessed for video-out at any arbitrary time (except VSYNC and HSYNC blank times) |
| 11:32.13 | DocScrutinizer | or is that "transparent" to the glamo engines? |
| 11:32.24 | quitte | so to not block the host bus double buffering is pretty much necessary? |
| 11:33.10 | quitte | the host bus can be used without the wait signal. so there must be some mechanism to interleave the memory accesses |
| 11:33.36 | DocScrutinizer | well, AIUI that's pretty much basics for all graphics adapters |
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| 11:34.17 | larsc | i suppose it would be an interesting experiment to add double buffering and have each buffer in one of the memory banks |
| 11:34.18 | DocScrutinizer | without buffering, you always get artifacts on display |
| 11:39.43 | quitte | hmm. i guess at this point i really need a register dump of the runnning glamo. i still don't see why writing 40 full frames/s wouldn't be possible. |
| 11:40.35 | quitte | what is the endianness of memwrite? |
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| 12:07.45 | quitte | <PROTECTED> |
| 12:07.56 | quitte | does shr have it? |
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| 12:49.38 | quitte | to doublecheck wether i'm reading the registers correctly. no interrupts are enabled except for some reason the micro processors? |
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| 19:21.01 | Weiss | quitte: on a recent DRM-enabled kernel, a command queue interrupt is used as well |
| 19:22.02 | Weiss | quitte: also, about accessing memory from host bus and Glamo at the same time: you can't access the exact same area, but you can tell Glamo to draw stuff at the "same" time as writing to it from the CPU.. i.e. no change of setup is needed, just a delay because of collisions |
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| 20:19.58 | Weiss | quitte: for comparison, I could get about 48 frames/sec with negligible CPU load using the 2D engine and interrupt-driven fences: http://www.bitwiz.org.uk/openmoko/waitq.png |
| 20:29.34 | DieMumiee | Weiss: are you still working on it? |
| 20:32.48 | Weiss | not really |
| 20:32.59 | Weiss | sometimes I think I'd like to, though |
| 20:33.22 | DieMumiee | always think about it when i see the device lying around.. |
| 20:33.48 | DieMumiee | crying silently .o( give me a better ui .. give me wayland .. and gles1 ) |
| 20:34.49 | DieMumiee | but then i think about the mesa code base and tiling .. and all the hurdles |
| 20:36.30 | Weiss | the trouble with 3D stuff for me is just that there's so much to get perfectly right before anything even happens.. so it's unspeakably difficult to debug |
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| 22:22.36 | Weiss | DieMumiee: of course, mainly I just don't have much time alongside work any more |
| 22:23.03 | Weiss | though, right now I'm putting what spare time I do have towards Project X (http://www.bitwiz.org.uk/s/2011/10/project-x.html) </shameless advertising> |
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