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| 16:22.44 | wuntee | has anyone been able to communicate with a pico chip pc202? i have a device that i am trying to communicate with that chip, but have been unable to figure out any of the communication protocols. from looking at the dev board, it seems like there are multiple jtac outputs, which align to some pads on the board i have. currently have a logic analyzer connected, but haven't gotten anything useful... |
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| 20:41.25 | roxfan | http://hackingbtbusinesshub.wordpress.com/2012/01/26/discovering-jtag-pinouts/ |
| 20:41.38 | roxfan | @ wuntee |
| 20:42.44 | *** join/#openjtag ntfreak (~ntfreak@unaffiliated/ntfreak) |
| 20:44.39 | wuntee | roxfan: thanks. so, after reading about jtag all day, i have a few questions maybe someone can answer. as i understand jtag is a serial in/out communication with a clock. if that is the case, can't you simply connect the correct pins to a ftdi 3.3 serial to usb type cable? what are things like http://www.segger.com/cms/j-link-edu.html and the associated adapters for? |
| 20:45.26 | roxfan | serial to usb is for UART communication only |
| 20:46.20 | roxfan | jtag is syncronous serial, and it has an extra pin (TMS) in addition to clock, input and output |
| 20:47.07 | wuntee | so, in the case of that segger j-link, what does the hardware actually do? why is it required? |
| 20:47.24 | roxfan | it's not "required" |
| 20:47.48 | roxfan | you can get cheaper ones that basically let you bitbang the pins from pc |
| 20:48.02 | roxfan | but that's quite slow, especially with the usb latency |
| 20:48.57 | roxfan | jlink and similar probes do all the low-level state machine stuff inside, so pc only has to send high-level commands |
| 20:48.58 | wuntee | the device/cable are fairly inexpensive. i am more trying to understand what their functionality is in order to understand if i need them before purchasing.. |
| 20:49.19 | wuntee | ahhh |
| 20:50.38 | wuntee | i think in should read more about jtag - thanks for the help though - any goto resources for a 101 on jtag? by past experiences has been with boards that have already been laid out for me - i.e.: solder this pin here, plug this here, run this software... |
| 20:55.42 | roxfan | dunno really... most of the official literature concentrates on boundary scan (testing interconnects etc) |
| 20:56.20 | roxfan | http://elinux.org/JTAG try some links maybe |
| 20:58.10 | wuntee | thanks - anything helps. |