| 01:18.36 | *** join/#openjtag _julian_ (~quassel@dslc-082-083-152-006.pools.arcor-ip.net) |
| 10:34.15 | zoobab | http://hackerspace.be/JTAG_pinout_detector |
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| 11:17.03 | *** part/#openjtag pirho (debian-tor@gateway/tor-sasl/pirho) |
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| 12:59.31 | ali_as | zoobab, assumes you know TDO? |
| 13:52.34 | zoobab | TDO? |
| 13:52.41 | zoobab | no |
| 13:52.49 | zoobab | you don't need to know TDO |
| 13:52.59 | zoobab | TDO has to be within the pins |
| 13:55.19 | roxfan | another one: http://www.openrce.org/blog/view/1546/JTAG_Enumeration_(tool) |
| 14:17.00 | ali_as | Are there any limits on driving TDO accidentally? |
| 14:22.22 | ali_as | I saw another design to do this, I think with a PIC a few years ago. |
| 14:24.03 | ali_as | I keep thinking a better way to do this involves resistors and looking for a drop in impedence when nTRST goes high. |
| 14:35.16 | roxfan | i doubt you'll break anything if you just drive it as normal gpio |
| 14:36.05 | roxfan | i wrote my own jtag finder a couple of years ago, worked fine (pxa255 cpu) |
| 14:47.31 | zoobab | where is it? |
| 14:47.33 | zoobab | url? |
| 14:48.55 | roxfan | i haven't put it up anywhere |
| 14:49.20 | roxfan | it was a one-use program anyway |
| 14:54.16 | roxfan | http://pastie.org/914145 <- try_id() is the main routine |
| 15:21.29 | ali_as | I usually start my stuff by modifying "hello world" too. Maybe everyone does. |
| 15:23.02 | tzanger | I just worked on a design that has a BF518F and an LPC2103 together |
| 15:23.17 | tzanger | common jtag chain, but I have since discovered that i need to use two separate jtag units with them :-) |
| 15:24.46 | ali_as | Haha, each one with the other set to bypass? |
| 15:29.34 | tzanger | no, I should be able to configure both jtag tools to ignore the other |
| 15:29.41 | tzanger | I just can't use one tool to access both |
| 15:30.13 | tzanger | I have a gnice+ for the bf518f (it's first on the chain), and use urjtag to use it, and then an olimex arm-usb to handle the lpc |
| 15:31.02 | tzanger | I may be able to get openjtag to twiddle the gnice+, it's an ftdi2232 based deivce like almsot everything else and I *only need jtag capability to load uboot into L1 and then flash the parallel flash |
| 15:32.21 | tzanger | I might also be able to get openjtag to allow me to use gdb with the gnice+ on the bfin, but that's so far not been a requirement |
| 15:33.18 | ali_as | That's what I mean, you have one bit of software that forces that hardware to be either arm or blackfin. So to use the chain you put the other device in bypass. |
| 15:33.34 | ali_as | You are using boundary scan on blackfin? |
| 15:34.58 | tzanger | oh yes I see what your'e saying now. |
| 15:35.49 | tzanger | if I want to load the arallel flash from jtag, yes I'll need boundary scan. I *think* (I don't have my notes in front of me atm) that I can program L1 and get uboot in there without it though |
| 15:36.23 | tzanger | I don't recall if the bfin internal registers have to be accessed from boundary scan or if there are a few TAP registers in there for it |
| 15:36.36 | tzanger | (i.e. from some internal debug system) |
| 15:37.22 | ali_as | I think it has internal debug, but I've never used blackfin. |
| 15:38.00 | ali_as | Just turned up and look briefly through documents when looking for debug protocols on other chips. |
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| 16:14.26 | roxfan | openocd doesn't do boundary scan |
| 16:14.50 | roxfan | well, maybe you could count svf/xsvf support for that... |
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