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| 00:51.47 | sn9 | hello |
| 01:16.08 | sn9 | AchiestDragon: you seem the least idle -- is there a faq url for jtag n00bs? |
| 01:16.56 | AchiestDragon | hmm ,, what you want to know |
| 01:18.29 | sn9 | well, for starters, are unbuffered cables for mips only, or would one be ok for arm? |
| 01:20.05 | AchiestDragon | it depends , you need to check the voltage that the target will support |
| 01:20.43 | AchiestDragon | some of the cheep jtag cables only support 5v signal levels , and some chips need 3.3v or 2.5v |
| 01:24.01 | sn9 | i'm referring to the design that has just four 100Ω resistors |
| 01:24.09 | sn9 | for 3.3V |
| 02:07.12 | AchiestDragon | http://elm-chan.org/works/avrx/xilinx.png |
| 02:07.59 | AchiestDragon | hmm |
| 02:08.06 | AchiestDragon | this one |
| 02:08.47 | AchiestDragon | <PROTECTED> |
| 02:12.16 | AchiestDragon | bed time for me anyway |
| 03:04.09 | sn9 | i was referring to this: http://www.diygadget.com/store/building-simple-jtag-cable/info_12.html |
| 03:04.18 | sn9 | sorry for the delay |
| 03:04.56 | sn9 | anybody else around? |
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| 05:29.30 | sn9 | ka6sox-laptop: hello |
| 05:30.04 | ka6sox-laptop | helo |
| 05:30.45 | sn9 | "helo" ? not "ehlo" ? |
| 05:33.08 | ka6sox-laptop | very tired here...worked 15hrs today. |
| 06:02.44 | sn9 | sounds something like my yesterday |
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| 18:10.48 | prpplague | anyone seen beewoolie lately? |
| 18:17.36 | sn9 | finally! activity in the channel! |
| 18:20.06 | prpplague | sn9: it goes in cycles here |
| 18:20.22 | prpplague | sn9: alot of projects are in dev cycles now |
| 18:20.26 | sn9 | yeah, i bet |
| 18:21.07 | sn9 | i still have questions about making an unbuffered cable |
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| 18:25.43 | prpplague | sn9: why make an unbuffered cable |
| 18:27.03 | sn9 | because i already have pretty much everything i would need to make one |
| 18:27.37 | sn9 | a wiggler is cheaper to order than to make, but shipping will take a while |
| 18:31.54 | prpplague | sn9: so whats the holdup? |
| 18:32.01 | sn9 | i guess my biggest question is whether the ribbon is absolutely required, or whether i could use multiple lengths of ordinary hook-up wire instead |
| 18:32.02 | prpplague | sn9: there are a ton of wiggler schematics available |
| 18:32.32 | prpplague | sn9: multiple wires are fine, but if you have some ide ribbon cable that'd be better |
| 18:32.51 | sn9 | yeah, i've seen wiggler schematics, and they all need parts i don't have on hand |
| 18:33.17 | prpplague | <sn9> because i already have pretty much everything i would need to make one |
| 18:33.24 | AchiestDragon | they say that if a job is worth doing , to do it right |
| 18:33.31 | prpplague | amen |
| 18:33.48 | sn9 | so the unbuffered isn't even worth making? |
| 18:34.15 | prpplague | sn9: only if you are going to interface with a 5v only device |
| 18:34.31 | sn9 | 3.3V |
| 18:34.32 | prpplague | sn9: otherwise you need to be buffered for 3.3v or 1.8v |
| 18:35.14 | sn9 | so, this is no good? : http://www.diygadget.com/store/building-simple-jtag-cable/info_12.html |
| 18:35.14 | AchiestDragon | well the unbuffered offers no protection to 1 the device your going to attach as its realy only 5v outputs but current limited with the resistros , and b offers no protection to the paralel port side so if you get it wrong you may need a new mobo |
| 18:35.29 | AchiestDragon | <PROTECTED> |
| 18:37.30 | prpplague | AchiestDragon: and using resistors will definetly limit the speed at which the jtag application can operate |
| 18:37.46 | AchiestDragon | yes |
| 18:38.05 | prpplague | sn9: if the device is not 100% jtag compliant, which many aren't, you will also have timing issues |
| 18:38.37 | sn9 | ah, that's where the mips/arm difference comes in... |
| 18:38.42 | AchiestDragon | the main problem is jtag is more often 2.5v on fpga's , the reisrot method is only sutable for 3.3v realy |
| 18:39.14 | AchiestDragon | and if you blow the jtag on a fpga then theres no a lot you can do with it |
| 18:39.41 | prpplague | sn9: ?? - <sn9> ah, that's where the mips/arm difference comes in... |
| 18:39.43 | AchiestDragon | ear rings or something i supose |
| 18:39.46 | prpplague | sn9: what difference is that? |
| 18:39.52 | sn9 | prpplague: timing |
| 18:39.55 | prpplague | AchiestDragon: key chains |
| 18:40.00 | prpplague | sn9: why is that a difference? |
| 18:40.12 | sn9 | < |
| 18:40.12 | sn9 | > |
| 18:40.35 | prpplague | sn9: that statement applies to both MIPS and ARM |
| 18:40.57 | AchiestDragon | and most of the others |
| 18:41.32 | sn9 | mips devices tend to be slower, so i guess that's why timing isn't as big an issue on mips |
| 18:41.46 | prpplague | sn9: thats not the timming i am refering to |
| 18:42.01 | AchiestDragon | sn9 do you have a 74hc05 or 74c05 |
| 18:42.18 | prpplague | sn9: timming in the usage/sampling of signals for jtag |
| 18:42.23 | sn9 | i have and gates, but no buffer ic |
| 18:43.21 | AchiestDragon | if you have eather of the ones i mentioned then http://www.achiestdragon.org/index.php?title=Jtag_wiggler&oldid=403 |
| 18:44.10 | AchiestDragon | you may need to invert the signals in software or add a 70hc04 to them prior to the 05 |
| 18:44.32 | AchiestDragon | and will have to sort out what pins to use on the parallel port end |
| 18:45.28 | AchiestDragon | but good for all jtag voltages and good to 2mhz (since the parallel port is only good to 1Mhz not realy a problem) |
| 18:46.12 | AchiestDragon | still need to find time to do the parallel port schematic for that design |
| 18:46.41 | AchiestDragon | and work out if i need invertors on it for the software |
| 18:49.56 | sn9 | i had already ordered a pre-made wiggler board, but i was considering also making the unbuffered cable before it arrives in order to dive in sooner |
| 18:50.23 | AchiestDragon | patiance |
| 18:52.31 | sn9 | virtuosity is good, but making the cable out of stuff i already had seemed hard to resist |
| 18:56.11 | AchiestDragon | you can make a cable to connect mains directly to an atx power connector , but its not going to work unless your mobo accepts direct mains without a psu |
| 18:57.36 | sn9 | very graphic example... |
| 18:58.50 | AchiestDragon | they get away without using buffers as the chip will usualy withstand the over voltage for a min before it causes any perminent damage , so things like that are ok for say programming a 3.3v cpld but if you want to leave it connected for a long period ie 5 mins then your going to have problems |
| 19:01.20 | AchiestDragon | the effect it has is because the input is beeing driven from 5v it forces the vccaux to 5v , that tries to drive the 2.5v section of the chip at 5v but the current resistors limit it so it settles at about 4v , because of the higher than normal voltage the chip gets hot |
| 19:02.04 | AchiestDragon | and you run the risk of burning out the input gate on the chip |
| 19:02.56 | AchiestDragon | if its a 3.3v input you get away with it for 5 to 10 mins , not realy any good for debug wher you need it connected for hrs at a time while working on it |
| 19:04.10 | AchiestDragon | 2.5v jtag , well damage to it is usualy after 3 mins , and 1.2v jtag it would be almost instant fry for it |
| 19:04.10 | sn9 | yeah, 100Ω on 5V is no substitute for regulated lines |
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| 19:40.44 | keesj | hello |
| 19:41.13 | sn9 | hi |
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| 19:44.59 | keesj | I have recently got my hands on a smdk2440 development board, and I have a amontec JTAG-Tiny, I use linux and I want to have fun:P |
| 19:45.33 | sn9 | great! |
| 19:46.58 | keesj | I used oe to create some images kernels and I even have a u-boot that might be working. the next step for me is to get a working openocd.cfg |
| 19:50.32 | keesj | I have stolen an openocd.cfg from the openmoko site. http://paste-it.net/2928/raw/ and was able to download some data from the main board. I am missing some configuration like where the flash is storred but moostly the problem I have now is that the reset halt is not working |
| 19:52.07 | keesj | I hope somebody can get me started. is there some knowledge of Samsung 2410 2412 2440 in the house :P |
| 19:52.39 | sn9 | so, you wanna retrieve what's currently in the flash? if you just want to overwrite, http://www.fluff.org/ben/linux-26/smdk2440.html |
| 19:54.06 | sn9 | linked from http://www.fluff.org/ben/linux-26/status.html |
| 19:54.13 | keesj | sn9: I also downloaded Ben Dooks's tools to upload via usb and was able to run a test app, but not a kernel yet |
| 19:55.00 | sn9 | he has a boot log from a kernel up, too |
| 19:55.44 | keesj | that is interresting |
| 19:56.20 | sn9 | http://www.fluff.org/ben/smdk2440/smdk2440-log0.txt |
| 20:01.52 | keesj | sn9: do you sometimes use jtag for kernel debugging? |
| 20:05.11 | sn9 | it can be done, but when it's possible to use a console, things are much easier |
| 20:16.07 | keesj | I was just wondering how usefull it would be and it sounded very usefull to be able to debug a kernel |
| 20:16.17 | keesj | using gdb |
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| 20:33.40 | sn9 | keesj: the usefulness is entirely dependent on the bugs you run into ;-> |
| 20:35.28 | keesj | of course, I tend to run into nasty ones :p |
| 20:36.01 | keesj | but I must say it's all very new to me (one year ago a still was an "experianced java developer" |
| 20:36.29 | sn9 | ah, you went the java route first... |
| 20:38.14 | keesj | c64_basic->gw_basic->c->perl->java->ruby->j2me->brew->c (emmbeded linux) |
| 20:39.03 | keesj | I have to go to sleep , but I will be back with more interesting questions:P thanks for the help |
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