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| 09:49.47 | nm__ | vmaster: hey, are you there |
| 10:00.07 | vmaster | hey nm__ |
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| 10:10.14 | nm__ | vmaster: do you know StrataFlash TE series on IXP 4xx platform ? |
| 10:11.45 | vmaster | uhm, don't think so |
| 10:17.29 | nm__ | vmaster: i want to flash my SF TE using jtag connector, do i need special when wired SF TE Series to IXP 4xx ? |
| 10:18.03 | vmaster | sorry, I have no idea what you mean |
| 10:18.26 | nm__ | vmaster: okie thx guy ;) |
| 10:33.04 | nm__ | vmaster: can you give me some information how do jtag erase/reprogramming external flash ? |
| 10:39.32 | vmaster | basically there are two ways - one uses the boundary scan chain to get direct access to the bus, the other uses debug features of the core to access the bus |
| 10:40.23 | vmaster | the openwince jtag tools use the first method, the OpenOCD uses the second |
| 10:40.39 | nm__ | vmaster: okie i see, |
| 10:41.11 | nm__ | vmaster: what about open jtag tool ? |
| 10:41.53 | nm__ | i want to sure that my diagram to SF TE flash work well w/ flashing using jtag . Can you give me some keyword for search this problem ? |
| 10:56.37 | vmaster | if the CPU can access the flash, JTAG will be able to access it, too |
| 10:58.19 | rwhitby | nm__: nslu2 has stratflash, and the nslu2-linux.org wiki has details on how to flash that with openwince tools |
| 10:58.53 | rwhitby | (the first method vmaster referred to) |
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| 12:36.32 | nm | rwhitby: okie |
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