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| 17:14.58 | alorenz | I am interested in hooking up a jtag to my nslu2 (slug), and have read the info in pinouts from nslu2-linux.org, but am still a bit confused if I need to also hook up TRSTn and RESET_IN_N signals |
| 17:15.51 | alorenz | Also can I just use an unbuffered cable from parallel port or do I have to build a buffered cable ? |
| 17:43.48 | vmaster | alorenz: do you want to use the jtag just for flashing, or do you want to be able to debug the ixp? |
| 17:44.53 | vmaster | alorenz: you'll certainly need buffers to account for the 3.3V of the slug vs 5V of the parport |
| 17:48.55 | alorenz | What I want to do is increase the memory size, for that according to the documentation I will need to install a different bootload (apex), and again according to the documenation I really need to have a reliable jtag to recover from problems |
| 17:49.43 | vmaster | alorenz: you'll only need to be able to flash then |
| 17:50.12 | vmaster | alorenz: that means you should be able to do without RESET_IN_N, and probably even without TRSTn |
| 17:51.22 | alorenz | what do the TRSTn and RESET_IN_N pins do ? I was not able to understand from the documentation |
| 17:52.10 | vmaster | TRSTn is used to reset the JTAG TAP (test access port), possibly including debug logic (but that depends on the target) |
| 17:52.16 | vmaster | RESET_IN_N resets the target processor |
| 17:52.43 | vmaster | as the nslu2 uses an XScale processor, you need both reset lines if you want to be able to debug |
| 17:53.11 | vmaster | flashing uses the jtag interface to get access to all the device pins |
| 17:53.17 | vmaster | you don't need the reset signals for that |
| 17:57.35 | alorenz | I have been reading on jtag at wiki.openwrt.org where they just hook up the 4 signal through 100 ohm resistor, is this enough to drop the voltage or should I really build the WIggler type ? |
| 17:58.19 | alorenz | which has a buffer the link is http://wiki.openwrt.org/OpenWrtDocs/Customizing/Hardware/JTAG_Cable |
| 18:03.27 | vmaster | sorry, not sure - I personally wouldn't use an unbuffered cable, but it might work just fine |
| 18:07.54 | AchiestDragon | http://www.whipy.demon.co.uk/wiggler.pdf although not showing pinout for a parallel port it supports 3.3 or 5v host and 1.2v to 5v jtag |
| 18:09.58 | alorenz | Thanks. Will probably make the buffered cable. .. |
| 18:12.00 | AchiestDragon | needs to be a 74hc05 or 74ac05 if the host is 3.3v |
| 18:12.40 | AchiestDragon | alot of the wigglers i have seen use 74hc244's they still give 5v output levels |
| 18:15.04 | alorenz | Thanks AchiestDragon, my link did have an example using the 244... Will make sure I check.... |
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