| 00:16.20 | vmaster | nbd: i've added the linker script, and build options to build a big-endian debug handler, too |
| 00:16.47 | nbd | ok. simply swapping the endianness with a script didn't work |
| 00:16.55 | vmaster | nbd: you'll have to modify target/xscale.c - xscale_deassert_reset() to use the debug_handler_be.bin |
| 00:17.06 | nbd | ok |
| 00:17.24 | vmaster | not sure if there are other things missing - i'll have to look into BE xscales tomorrow (1am here) |
| 00:18.20 | nbd | it's also 1 am here :) |
| 00:18.24 | nbd | i'll check it out right now |
| 00:18.24 | vmaster | if it doesn't work with the be debug handler, it would be nice if you could send me a complete log to Dominic.Rath <at> gmx.de (run with -l <logfile>) |
| 00:18.35 | vmaster | heh, yeah, sleep is for the weak, and i AM weak ;) |
| 00:18.35 | nbd | will do |
| 00:19.00 | nbd | i need to skip sleep today to get my sleep cycle back in order :) |
| 00:19.42 | vmaster | heh, i'd rather skip a day rather than skipping a night full of wonderful sleep ;) |
| 00:19.48 | vmaster | anyway, i'm off, n8 |
| 00:27.07 | [g2] | sweet dreams vmaster |
| 01:07.30 | *** join/#openjtag ka6sox (n=ka6sox@nslu2-linux/ka6sox) |
| 02:30.53 | [g2] | nbd still up ? |
| 02:44.32 | *** join/#openjtag rwhitby (n=rwhitby@nslu2-linux/rwhitby) |
| 08:13.37 | *** join/#openjtag rwhitby (n=rwhitby@nslu2-linux/rwhitby) |
| 09:48.31 | *** join/#openjtag vmaster_ (n=vmaster@p549B5BAF.dip.t-dialin.net) |
| 10:05.02 | *** join/#openjtag bullet (n=bullet@126.56.203.62.cust.bluewin.ch) |
| 10:48.14 | vmaster | nbd: http://mmd.ath.cx/openocd/OpenOCD.XScale_branch.r108-1.diff |
| 10:49.02 | vmaster | there are additional opcodes that get loaded into the mini-Icache which are dynamically generated by the OpenOCD, this patch fixes them, too (still needs the debug_handler_be.bin changed) |
| 10:49.09 | nbd | thanks. will try it now |
| 10:51.13 | nbd | same result |
| 10:51.29 | nbd | should i try to restart the board? |
| 10:52.26 | nbd | or do you want another logfile? |
| 10:52.40 | vmaster | another logfile would be nice |
| 10:52.40 | nbd | no problem |
| 10:53.14 | vmaster | do you have any way of seeing whether the board is running? |
| 10:53.37 | vmaster | i.e. executing the original bootloader code |
| 10:54.35 | nbd | i can hook up the serial console |
| 10:57.40 | nbd | i restarted the board, made sure the boot loader was running |
| 10:57.41 | vmaster | doh, sorry |
| 10:57.44 | nbd | then fired up openocd |
| 10:57.50 | nbd | and it wrote a single . on the console |
| 10:57.51 | nbd | and locked up |
| 10:58.13 | vmaster | in the config file i gave you |
| 10:58.25 | vmaster | change the little to big |
| 10:58.40 | nbd | oh :) |
| 10:59.04 | vmaster | but the console output is good, it shows us that the reset handling is working |
| 10:59.32 | nbd | still loops. i'll make another logfile |
| 11:01.08 | nbd | sent |
| 11:05.15 | vmaster | ok, handling different endiannesses is a mess in the current xscale code |
| 11:05.28 | vmaster | i'll have to clean this up a bit, before further tests make any sense |
| 11:05.35 | nbd | ok |
| 11:05.47 | nbd | no problem, just let me know when you have something new :) |
| 11:08.50 | vmaster | yeah, i'll ping you |
| 11:29.38 | vmaster | hum, guess noone ever used the openocd with a big-endian target... after evaluating the target line, endianness is hardcoded to little |
| 11:31.35 | vmaster | nbd: in target/target.c, remove line 910 (*last_target_p->endiannes = ...) |
| 11:31.59 | nbd | ok |
| 11:33.42 | nbd | loops again. making another logfile |
| 11:35.23 | nbd | sent |
| 11:35.34 | vmaster | okay, thanks |
| 11:42.58 | [g2] | vmaster which version of RedBoot are you running ? |
| 11:43.34 | [g2] | s/vmaster/nbd/ |
| 11:43.36 | [g2] | :) |
| 11:43.47 | nbd | none, currently |
| 11:44.02 | nbd | still have rgloader on that thing |
| 11:44.07 | [g2] | heh.. Oh yeah that's the reason for this exercise :) |
| 11:44.38 | nbd | btw. nice bot that you have here :) |
| 11:44.48 | [g2] | it's riker's |
| 11:45.19 | [g2] | I think he logs this, #openslug and #nslu2-linux |
| 11:45.28 | [g2] | and like 40 other channels :) |
| 11:45.32 | nbd | :) |
| 11:46.27 | [g2] | nbd the other option is to code up the 3 line shim that puts the box in LE mode, and then loop forever |
| 11:46.36 | [g2] | then the box would be in LE mode :) |
| 11:47.21 | [g2] | nbd btw I booted a BE kernel last nige |
| 11:47.30 | [g2] | s/nige/night/ |
| 11:53.53 | vmaster | nbd: was there an output on the serial console? |
| 11:54.00 | nbd | just the . |
| 11:54.43 | vmaster | would be nice if you could step through xscale_deassert_reset, and monitor the serial console |
| 11:55.09 | nbd | with gdb? |
| 11:55.12 | vmaster | yeah |
| 11:55.22 | nbd | ok, need to figure out how to do that |
| 11:55.28 | nbd | i never used a debugger for anything :) |
| 11:55.44 | vmaster | configure with: CFLAGS="-O0 -g -Wall" ./configure --enable-parport |
| 11:55.57 | vmaster | then compile again |
| 11:56.00 | nbd | k |
| 11:56.38 | vmaster | then (sudo) gdb ./openocd |
| 11:56.44 | vmaster | in src/ |
| 11:56.53 | vmaster | break xscale_deassert_reset |
| 11:56.57 | [g2] | nbd is a real man, printk's/printf's and an ocilliscope |
| 11:57.41 | vmaster | run -f ixp425_lat.cfg -d |
| 11:58.03 | vmaster | hehe |
| 11:58.49 | nbd | i always do printk debugging when porting kernels to a board :) |
| 11:59.51 | nbd | got the breakpoint |
| 12:00.00 | vmaster | anything up to this point on the console? |
| 12:00.11 | nbd | the . is already there |
| 12:00.14 | nbd | boot loader is still running |
| 12:00.21 | vmaster | it is running atm? |
| 12:00.28 | nbd | yes |
| 12:00.43 | vmaster | can you measure nSRST? |
| 12:01.12 | nbd | ok, just need to look for the pinout of the jtag port |
| 12:01.33 | vmaster | is it a 20-pin header? |
| 12:01.38 | nbd | yes |
| 12:03.10 | vmaster | pin 15 |
| 12:03.47 | nbd | 2.2V |
| 12:04.17 | vmaster | hum, it is /supposed/ to be low at this point |
| 12:04.27 | vmaster | but guess 2.2v qualifies as a high...? |
| 12:04.35 | nbd | some other pins are 3.3 |
| 12:05.08 | nbd | so 2.2 might be low |
| 12:05.43 | vmaster | can you measure pin3, too? (nTRST) |
| 12:07.09 | [g2] | nbd the truth is that for 99% of the cases printk's are fine |
| 12:07.34 | [g2] | it's really only bootloader and tricky device issue where a debugger comes in handy |
| 12:07.44 | [g2] | and some threaded apps |
| 12:09.28 | [g2] | or an oscope on the memory bus :) |
| 12:09.42 | [g2] | but it's been like a decade since that |
| 12:10.07 | vmaster | heh, you'll have a hard time with your oscope on a bga ddr2 chip |
| 12:10.32 | [g2] | that's what mictor connectors are for :) |
| 12:10.41 | nbd | interesting, the trst pin is almost at 0 |
| 12:11.02 | vmaster | there's definitely a problem with the reset line |
| 12:11.07 | vmaster | the target MUST be in reset at this point |
| 12:11.21 | vmaster | i'll get myself something for lunch, bbiab |
| 12:11.29 | [g2] | vmaster have a great lunch |
| 12:11.30 | nbd | so it's a problem with my cable? |
| 12:11.37 | vmaster | when you comment the target line, you can work low-level with the jtag |
| 12:11.51 | vmaster | jtag_reset allows you to toggle the lines |
| 12:12.10 | vmaster | nbd: probably |
| 12:12.16 | nbd | ok, i'll check my cable |
| 12:41.55 | nbd | vmaster: ok. i checked. it's not a problem with my cable, because openwince can set that pin to high |
| 12:44.32 | vmaster | ok, can you show me how you're setting that pin in in openwince? guess you've used the current cvs code? |
| 12:45.33 | nbd | i used some fork of it |
| 12:45.46 | nbd | probably based on the current cvs |
| 12:45.52 | nbd | i'll check the code |
| 12:46.55 | nbd | the lattice_set_trst function simply does this: |
| 12:46.55 | nbd | <PROTECTED> |
| 12:47.03 | nbd | and TRST is defined to 4 |
| 12:48.13 | vmaster | okay, but we're talking about SRST |
| 12:48.46 | nbd | the last one you told me to measure was trst |
| 12:49.58 | vmaster | ok, sorry, let's start over again: |
| 12:50.29 | vmaster | there are two reset inputs, nTRST (keeps the JTAG state machine and debug stuff in reset), and nSRST (keeps the processor in reset, but lets you work with the debug facilities) |
| 12:52.01 | nbd | you're right, srst does seem to be broken |
| 12:52.24 | nbd | the 2.2V came from the board |
| 12:54.26 | vmaster | hum, okay |
| 12:54.33 | vmaster | the wrv54g is based on some other board, right? |
| 12:54.42 | nbd | i don't know |
| 12:55.52 | vmaster | uhm, hope i didn't mix this up - what board do you have? a wrv54g? |
| 12:56.38 | nbd | wrv54g compatible, gemtek |
| 12:56.53 | nbd | it's not being sold anywhere, so i don't know the real model |
| 12:57.32 | vmaster | linux kconfig talks about gemtek wx5715 |
| 12:57.44 | vmaster | as the board being used inside the wrv54g |
| 12:58.51 | vmaster | ok, to debug an xscale core, we need to be able to toggle both reset lines individually |
| 12:59.18 | vmaster | first, both lines are asserted (low), then ntrst gets lifted, and we start downloading code into the mini icache |
| 13:00.13 | vmaster | uh, actually, ntrst gets lifted, then we write some jtag register so nsrst is left asserted internally, lift nsrst, and then download the code |
| 13:01.07 | vmaster | with the lattice cable, the openocd writes D3=0 for a low level on nSRST, and D3=1 for a high level |
| 13:02.48 | vmaster | if this doesn't work, all further steps are bound to fail |
| 13:02.49 | nbd | hmm... i just checked with the datasheet of the hex buffer chip in the jtag cable |
| 13:02.58 | vmaster | is it something home-made? |
| 13:03.03 | nbd | no |
| 13:03.13 | nbd | it does look like it's wired up correctly |
| 13:03.35 | vmaster | ok, try commenting out the target line in the .cfg |
| 13:03.43 | vmaster | then telnet to port localhost port 4444 |
| 13:03.50 | vmaster | well, run the openocd, then telnet |
| 13:06.08 | nbd | on the other hand, i mean shouldn't the cable pull down the srst line if it's disabled? |
| 13:06.25 | nbd | i mean it isn't supposed to be on 2.2V, right? |
| 13:08.17 | vmaster | it's supposed to be 0V at the beginning of xscale_deassert_reset |
| 13:08.25 | vmaster | i measured 0.1 on my PXA250 board |
| 13:09.03 | vmaster | how's nSRST routed on your cable, through the hex buffer? |
| 13:09.29 | nbd | yes |
| 13:09.55 | *** join/#openjtag dwery (n=dwery@nslu2-linux/dwery) |
| 13:09.58 | nbd | do you think i should try to bypass the hex buffer for this pin? |
| 13:10.07 | *** part/#openjtag dwery (n=dwery@nslu2-linux/dwery) |
| 13:10.12 | nbd | i could solder a wire on there |
| 13:10.14 | *** join/#openjtag dwery (n=dwery@nslu2-linux/dwery) |
| 13:10.21 | vmaster | no, nSRST is supposed to be open-drain |
| 13:10.48 | vmaster | but directly driving it high/low should work, too |
| 13:11.24 | nbd | so what should i try? |
| 13:12.37 | nbd | if i disconnect the srst line and measure it against ground, i get 0V |
| 13:12.45 | vmaster | on the board? |
| 13:12.48 | vmaster | or on the cable? |
| 13:12.52 | nbd | on the cable |
| 13:12.55 | nbd | on the board it's 2.2V |
| 13:13.11 | vmaster | 2.2v with the cable disconnected? |
| 13:13.15 | nbd | yes |
| 13:16.48 | vmaster | i'll see what my board looks like, hold on |
| 13:24.35 | vmaster | it's plain 3.3v while the board is running |
| 13:24.43 | vmaster | with nothing connected |
| 13:25.10 | vmaster | you don't happen to know if there's a power/reset supervisor on that board? |
| 13:25.16 | vmaster | or rather which one there is |
| 13:25.34 | nbd | now mine is also 3.3V |
| 13:25.51 | nbd | i don't know |
| 13:26.32 | vmaster | is there a series resistor on the srst line of your cable? after the hex-buffer? |
| 13:27.04 | nbd | yes |
| 13:27.47 | nbd | there's a resistor after every output of the hex-buffer |
| 13:32.32 | nbd | i need to go and grab some food now |
| 13:32.34 | nbd | will be back soon |
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| 14:10.09 | vmaster | nbd: when you're back, lets try driving the reset signals manually |
| 14:15.06 | nbd | ok, i'm back |
| 14:15.37 | vmaster | ok, comment out the target line in the .cfg, connect the interface, and launch the openocd |
| 14:16.18 | nbd | ok |
| 14:16.24 | nbd | Warning: gdb_server.c:1326 gdb_init(): no gdb ports allocated as no target has been specified |
| 14:17.14 | vmaster | yeah, that's fine |
| 14:17.20 | vmaster | now telnet to localhost port 4444 |
| 14:17.33 | nbd | ok |
| 14:17.37 | vmaster | endstate rti |
| 14:17.44 | vmaster | irscan 0 0x7e |
| 14:17.46 | vmaster | var id 32 |
| 14:17.49 | vmaster | drscan 0 id |
| 14:17.51 | vmaster | var id |
| 14:18.18 | nbd | id (1 fields): |
| 14:18.18 | nbd | 0x9277013 (/32) |
| 14:18.49 | vmaster | ok, that's the ixp425's JTAG ID |
| 14:19.08 | vmaster | jtag_reset 1 0 |
| 14:19.29 | vmaster | and then measure pin 3 (ntrst) |
| 14:19.35 | vmaster | should be close to 0v |
| 14:19.52 | nbd | but it says trst: 1 and srst: 0 |
| 14:19.52 | vmaster | pin 15 (nsrst) /should/ be 3.3v |
| 14:20.13 | vmaster | yeah, the 1 means "asserted" |
| 14:20.18 | nbd | ok |
| 14:20.20 | nbd | measuring |
| 14:20.22 | vmaster | it's a bit misleading |
| 14:20.50 | nbd | yep. trst is close to 0 and srst is close to 3.3 |
| 14:20.58 | vmaster | jtag_reset 0 0 |
| 14:21.02 | vmaster | both should be 3.3 |
| 14:21.35 | nbd | yep |
| 14:21.39 | vmaster | jtag_reset 0 1 |
| 14:21.53 | vmaster | what do you measure on pin 15? |
| 14:22.07 | nbd | 2.2 |
| 14:22.21 | vmaster | is the board running? |
| 14:22.23 | vmaster | bootloader? |
| 14:22.39 | nbd | need to try again because it crashed while trying to boot the image |
| 14:23.20 | nbd | restarted it. should i only run the last jtag_reset command again? |
| 14:23.29 | vmaster | yeah |
| 14:23.42 | nbd | boot loader is still running |
| 14:24.43 | vmaster | ok, you can quit the openocd |
| 14:26.33 | nbd | so srst is not working? |
| 14:26.44 | vmaster | nope... |
| 14:26.56 | nbd | could it be that they moved it somewhere else on this board? |
| 14:27.24 | vmaster | i'm not an electronics guy, but connecting an 100ohms resistor between nSRST and GND should pull the line low while preventing a short circuit, right? |
| 14:27.50 | nbd | i'm also not an electronics guy, but i think that'd to the trick |
| 14:27.59 | nbd | but i just tried that and it didn't stop the boot loader |
| 14:28.13 | lennert | i'd use a resistor in the kohm range, but yes |
| 14:28.58 | vmaster | is there a reset button on the board? |
| 14:28.59 | lennert | 100 ohm at 5V will make 50 mA flow |
| 14:29.28 | nbd | yes, there is a button |
| 14:30.08 | nbd | but i think it's just gpio |
| 14:30.12 | nbd | doesn't do anything when i press it |
| 14:31.48 | vmaster | ok |
| 14:32.07 | vmaster | brb |
| 14:42.18 | vmaster | ok, i guess the board is using a reset supervisor with totem-pole outputs, but they have the jtag nsrst directly connected to the RST_N |
| 14:42.49 | nbd | there's a place on the board where a resistor could fit in that is connected to the reset on one side and gnd on the other |
| 14:43.01 | nbd | does that mean anything? |
| 14:43.51 | vmaster | does your board look similar to this: http://bilder.fliegl.de/misc/2004-03-05-wlan/p403050915.jpg ? |
| 14:44.27 | nbd | a few components are different, but the board layout is the same |
| 14:45.11 | vmaster | ok, so you're talking about R134 or R137? |
| 14:45.52 | nbd | 137 |
| 14:48.22 | vmaster | i think they followed the IXDP425 reference design |
| 14:48.27 | vmaster | they have several resistors not fitted to allow the jtag signals to be pulled up or down |
| 14:49.44 | vmaster | but that wouldn't affect your problem |
| 15:17.49 | vmaster | nbd: maybe if you could identify the reset supervisor used on the board we could work around this problem |
| 15:19.09 | nbd | how? |
| 15:24.58 | vmaster | ok, on my board, there's a reset supervisor with totem-pole output, too, but they have a reset input connected to the input of the supervisor |
| 15:29.56 | nbd | can it be the 74lv320? |
| 15:30.06 | nbd | (philips) |
| 15:31.44 | nbd | oh, 32D, not 320 |
| 15:32.17 | nbd | description says quad 2-input OR gate |
| 15:33.35 | vmaster | is that chip somehow connected to nSRST? |
| 15:34.24 | nbd | yes, but it's not the only one |
| 15:34.28 | nbd | let me check the other one |
| 15:35.16 | nbd | the other one's a 74LVD8D |
| 15:35.52 | nbd | btw. SRST is connected to an output of the or gate that i mentioned first |
| 15:36.05 | *** join/#openjtag p2-mate (n=p2@cable-87-244-184-144.upc.chello.be) |
| 15:36.25 | nbd | hmm... DBD, not D8D - this stuff is hard to read |
| 15:36.44 | nbd | or is it 8? i don't know |
| 15:36.55 | nbd | anyway, that's the other chip. let me check if there are more |
| 15:37.59 | nbd | there are lots of chips that look like that |
| 15:38.07 | nbd | and some of the other ones seem to be connected too |
| 15:39.46 | nbd | could it be that this or gate is pulling the reset up? |
| 15:40.40 | vmaster | yeah, i think so |
| 15:40.50 | vmaster | that could explain the 2.2v |
| 15:40.56 | nbd | do you want me to follow the or gate to see where it gets its input from? |
| 15:41.28 | vmaster | there are two inputs for that output, would be nice if you could track them dow |
| 15:41.33 | vmaster | s/dow/down/ |
| 15:41.53 | nbd | ok |
| 15:43.27 | nbd | pretty hard to track |
| 15:46.38 | nbd | one input is connected to the output |
| 15:46.50 | nbd | does that make sense? |
| 15:47.31 | vmaster | but i'd say no... |
| 15:48.03 | vmaster | are you using a multimeter that beeps on a connection? |
| 15:48.36 | vmaster | mhh, an input of the same or, or of another or? |
| 15:48.49 | vmaster | there are 4 two-input ors in that chip |
| 15:52.08 | nbd | yes, i'm using a beeping multimeter |
| 15:52.16 | nbd | i haven't identified the other chip yet |
| 15:52.30 | vmaster | it's a AND gate |
| 15:52.31 | nbd | but as far as i can trace the lines, the input of the first one goes somewhere near the cpu |
| 15:52.34 | vmaster | 74LV08D |
| 15:52.41 | nbd | ah |
| 15:53.15 | nbd | i'll check if it goes to an input or an output |
| 15:53.27 | vmaster | a few centimeters away from those two chips |
| 15:53.37 | vmaster | Q2 and Q10 |
| 15:53.40 | vmaster | can you identify those? |
| 15:54.00 | vmaster | can't read the markings on the picture |
| 15:54.04 | nbd | it's an input (on the and chip) |
| 15:54.25 | nbd | where are q2 and q10? |
| 15:54.35 | vmaster | on the opposite side of the large voltage regulator |
| 15:55.03 | nbd | ah, there |
| 15:55.07 | vmaster | one of them is a philips, too |
| 15:55.48 | nbd | q2 is RT9202 |
| 15:55.53 | nbd | CS5KGOH |
| 15:56.16 | nbd | q10 is PHKD6N2 |
| 15:56.28 | nbd | D3076 |
| 15:56.40 | lennert | CS5KGOH sounds like some C2H5OH variant |
| 15:57.00 | vmaster | q2 is a DC-DC converter, not what we're looking for |
| 15:59.17 | nbd | btw. the line that i traced from the or seems to disappear under the flash chip and then go to the cpu |
| 15:59.24 | nbd | because there are no resistors or anything, i can't verify that |
| 16:02.03 | vmaster | there are two small chips below the flash chip |
| 16:05.01 | nbd | no match there |
| 16:05.37 | nbd | btw. are you going to be at the 23c3? |
| 16:06.36 | vmaster | no, never been to a ccc |
| 16:06.44 | vmaster | and i don't think I'll make it this year |
| 16:10.38 | lennert | fosdem 2007? |
| 16:11.34 | vmaster | i'd like to, but i'm not sure if my university is going to sponsor me again |
| 16:30.21 | lennert | fosdem don't sponsor speakers? |
| 16:30.31 | lennert | what does it cost you to get there? |
| 16:37.23 | vmaster | guess around 300 euro |
| 16:46.38 | *** join/#openjtag prpplague (n=billybob@69.73.233.40) |
| 16:51.45 | vmaster | heh, going by plane would be only half that money |
| 18:11.30 | prpplague | vmaster: ?? |
| 18:12.43 | vmaster | 17:31 < lennert> what does it cost you to get there? |
| 18:12.43 | vmaster | 17:38 < vmaster> guess around 300 euro |
| 18:12.44 | vmaster | 17:47 -!- prpplague [n=billybob@69.73.233.40] has joined #openjtag |
| 18:13.05 | vmaster | if that's what you're refering to |
| 18:13.54 | prpplague | ahh |
| 18:14.36 | prpplague | vmaster: thought maybe you were refering to my impending move to the states |
| 18:14.57 | vmaster | heh, no, guess i wouldn't want to know how much something like this costs |
| 19:12.53 | nbd | vmaster: btw. is there anything else i could check on this xscale board or should i give up for now? |
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