| 07:05.27 | *** join/#openjtag rwhitby (n=rwhitby@nslu2-linux/rwhitby) |
| 09:21.23 | *** join/#openjtag bullet (n=bullet@240.29.79.83.cust.bluewin.ch) |
| 09:48.19 | *** join/#openjtag vmaster_ (n=vmaster@p549B5EDC.dip.t-dialin.net) |
| 10:31.34 | *** join/#openjtag AchiestDragon (n=david@whipy1.demon.co.uk) |
| 11:40.55 | *** join/#openjtag rwhitby (n=rwhitby@nslu2-linux/rwhitby) |
| 12:15.24 | *** join/#openjtag prpplague (n=billybob@69.73.234.103) |
| 12:20.41 | *** join/#openjtag prpplague (n=billybob@216.110.103.143) |
| 13:50.10 | *** join/#openjtag [g2] (n=g2@nslu2-linux/g2) |
| 15:01.34 | *** join/#openjtag purl (i=ibot@pdpc/supporter/active/TimRiker/bot/apt) |
| 15:01.34 | *** topic/#openjtag is This is the place to discuss JTAG and Bootloaders |
| 16:43.00 | [g2] | ka6sox ping |
| 16:47.38 | ka6sox | [g2], pong |
| 16:50.31 | [g2] | ka6sox what ever happened with the openjtag adapter ? |
| 16:50.47 | [g2] | the hw thingy |
| 16:51.24 | ka6sox | it morphed to be the Geep |
| 16:51.52 | ka6sox | specifically the geep-b |
| 16:54.07 | [g2] | ok where's the geep-b at ? |
| 16:54.39 | ka6sox | the design is done, its being checked |
| 16:54.57 | ka6sox | then will go out for alpha boards. |
| 16:54.57 | [g2] | are you going to build some ? |
| 16:54.57 | AchiestDragon | http://www.whipy.demon.co.uk |
| 16:54.57 | ka6sox | yes |
| 16:54.58 | AchiestDragon | yes |
| 16:55.08 | [g2] | hey AchiestDragon. Nice to see you |
| 16:56.17 | AchiestDragon | well now i got a new house soted i should be able to get on with it |
| 16:57.54 | ka6sox | [g2] AchiestDragon's design was what I wanted the OJ adapter to be.... |
| 17:01.23 | ka6sox | [g2], I plan on building them here in the states. |
| 17:01.33 | ka6sox | (some of them anyways) |
| 17:03.07 | [g2] | does geep-b have a processor too ? or just and S3 and AVR ? |
| 17:04.30 | AchiestDragon | just the s3 and a avr , but looks like theres room for the minimips softcore cpu in the s3 |
| 17:05.17 | AchiestDragon | im trying to find out from those doing a gnu arm softcore if it will fit in the s3 |
| 17:05.50 | ka6sox | [g2] the shematics are available on www.whipy.demon.co.uk |
| 17:06.18 | [g2] | ka6sox that's what I was looking at, but I didn't notice a processor |
| 17:06.19 | AchiestDragon | if not i may be able to come up with a cpu that will emulate the arm cpu instruction set |
| 17:06.26 | ka6sox | AVR |
| 17:06.44 | ka6sox | just enough to be able to bootstrap |
| 17:07.34 | ka6sox | okay back to work here... AchiestDragon knows all the details. |
| 17:07.53 | ka6sox | cya'all later. |
| 17:08.18 | vmaster | ARM killed the narm project |
| 17:08.24 | vmaster | or whatever that was called |
| 17:11.24 | [g2] | vmaster on a different subject, the LPC2103 |
| 17:11.56 | [g2] | if I apply power and JTAG signals I can probably just JTAG into the onboard flash ? |
| 17:12.17 | AchiestDragon | the avr is mainly used for config and bootstrap , but after that you could program it for other uses , and beeing an fpga it can be configured eather as a state machine or a configure the fpga to have a soft cpu |
| 17:12.42 | vmaster | [g2]: power + oscillator, yeah |
| 17:12.53 | AchiestDragon | and theres quite a few softcore cpus like the t80 and others that will fit in the fpga no problem |
| 17:13.02 | [g2] | vmaster I think there's an ocillator on the board |
| 17:13.12 | vmaster | [g2]: you also have to pull rtck (either up or down) |
| 17:13.14 | AchiestDragon | getting a 16 bit cpu thats linux capable to fit is a bit harder |
| 17:14.22 | [g2] | vmaster I've got this board http://www.k9spud.com/arm/lpc2103/ |
| 17:15.55 | AchiestDragon | shame about the nnARM |
| 17:16.26 | prpplague | there are plenty of nix style OS's that will run on 8/16 bit platforms but you generally don't see linux in those areas |
| 17:16.46 | AchiestDragon | true |
| 17:17.45 | AchiestDragon | remebers cp/m and mp/m on the z80 |
| 17:18.02 | prpplague | http://uzix.sourceforge.net/ |
| 17:18.15 | prpplague | i started on an arm7tdmi port of uzix but never finished |
| 17:18.41 | [g2] | vmaster Pin 3 on the JTAG header ? http://www.k9spud.com/bbmicro/schematic-1.0.php |
| 17:19.14 | vmaster | [g2]: yeah, exactly |
| 17:19.25 | vmaster | [g2]: you have to pull it to ground with 4.7k-120k |
| 17:19.31 | AchiestDragon | one of the first cpus i ever programed on was a z80 , and back then it was all manual assembly into hex |
| 17:19.46 | vmaster | s/120k/10k/ |
| 17:19.55 | prpplague | AchiestDragon: hehe yea |
| 17:20.18 | [g2] | vmaster would that be the same a sreset ? |
| 17:20.26 | prpplague | AchiestDragon: i sold my rockwell kit a few years ago on ebay, got almost $900 for it |
| 17:20.45 | vmaster | [g2]: sorry, not sure what you mean? |
| 17:21.53 | AchiestDragon | i had a nascom 1 back in 1979 , shame i nolonger have it , it went years ago now |
| 17:22.15 | [g2] | vmaster I meant board reset or just connected to ground |
| 17:22.58 | prpplague | AchiestDragon: i started hacking the Gameboy a few years back, thats what got me into hacking kids toys |
| 17:23.00 | vmaster | [g2]: just pulled to ground |
| 17:23.10 | prpplague | AchiestDragon: now its my passion, hehe' |
| 17:24.22 | [g2] | vmaster sorry I'm such a noob |
| 17:24.47 | vmaster | [g2]: hold on... the user manual seems to contradict itself... |
| 17:24.57 | [g2] | we've got the high speed GW adapter working with the XScale and Xilinx S3 |
| 17:26.32 | [g2] | I'd like to get it working with the lpc now |
| 17:28.31 | vmaster | [g2]: do you have the LPC2103 user manual? |
| 17:29.04 | vmaster | page 250 says: |
| 17:29.06 | vmaster | On the LPC2101/02/03, the pins TMS, TCK, TDI, TDO, AND TRST are multiplexed with P0.27 - P0.31. To have them come up as a Debug port, connect a weak bias resistor (4.7-10 k& depending on the external JTAG circuitry) between VSS and the RTCK pin. |
| 17:29.58 | vmaster | later on page 252 it says: |
| 17:30.05 | vmaster | For debugging with JTAG pins, RTCK must be HIGH as the RST pin is released (see Figure 66). RTCK may be driven HIGH externally or allowed to float HIGH via its on-chip pull-up. |
| 17:30.53 | [g2] | vmaster great! Thanks for the detailed pointer |
| 17:31.07 | vmaster | yeah, but doesn't vss mean ground? |
| 17:31.43 | [g2] | yeah I think the mean ground |
| 17:32.24 | [g2] | I'll have to look at the schematic and see how RTC is pulled (if at all) |
| 17:32.30 | vmaster | it's not pulled at all |
| 17:32.30 | [g2] | RTCK |
| 17:32.44 | vmaster | the olimex 2103 board pulls it high |
| 17:32.55 | vmaster | http://www.olimex.com/dev/images/lpc-h2103-sch.gif |
| 17:34.46 | [g2] | on the k9spud board it look that there's a reistor on RTCK |
| 17:35.22 | vmaster | acorrding to the schematic it's only a series resistor |
| 17:35.34 | [g2] | and debug select has a jumper |
| 17:35.35 | vmaster | of 51ohm |
| 17:35.39 | [g2] | nod |
| 17:35.47 | vmaster | yeah, but you need RTCK and DBGSEL |
| 17:35.53 | vmaster | the olimex board pulls both high |
| 17:35.57 | vmaster | to 3.3V |
| 17:36.12 | [g2] | the jumper pulls it to 3.3 |
| 17:36.43 | [g2] | I just need to jumper J7 |
| 17:38.16 | [g2] | if it gets pulled high, then it needs to be connected with a resistor to be pulled HIGH and they don't mean GND but really VSS |
| 17:39.17 | [g2] | which means I might be able to pickup the V3.3 from the DebugSEL line |
| 17:39.27 | vmaster | ah, yeah, DBGSEL has to be connected to 3.3V directly, RTCK needs to be connected through a resitor to 3.3V |
| 17:39.48 | vmaster | RTCK needs the resistor because it becomes an output later |
| 17:40.17 | [g2] | ok, so a 4.7K or 10K between there and v3.3 |
| 17:40.21 | vmaster | yeah |
| 17:40.44 | [g2] | then we don't fry the RTCK I/O |
| 17:41.24 | vmaster | http://www.k9spud.com/wiki/LPC2101/2/3_FAQ |
| 17:41.25 | vmaster | hehehe |
| 17:49.21 | [g2] | time for lunch |
| 18:16.43 | *** join/#openjtag dwery (n=dwery@nslu2-linux/dwery) |
| 19:46.17 | *** join/#openjtag lennert (n=buytenh@nslu2-linux/lennert) |
| 19:58.50 | [g2] | hey lennert |
| 19:59.04 | [g2] | vmaster pointed me to the right spot on the LPC2103 in the manual |
| 19:59.04 | lennert | hey gee two |
| 19:59.31 | [g2] | I think I may need to dig up 4.7K or 10K resistor |
| 19:59.36 | lennert | right spot? |
| 20:00.10 | [g2] | yeah, I'll e-mail you a the log |
| 20:00.14 | lennert | k |
| 20:01.23 | *** join/#openjtag prpplague (n=dave@69.73.223.247) |
| 20:03.58 | vmaster | [g2]: you got it working? |
| 20:04.19 | [g2] | vmaster haven't tried yet |
| 20:04.23 | vmaster | ah, ok |
| 20:04.46 | vmaster | [g2]: you just need a resistor of several k - olimex is using 100k, and it still works |
| 20:05.16 | [g2] | right now using lennert's sw we can identify the XScale and program the Xilinx S3 |
| 20:05.27 | [g2] | I'd imagine we can do other Xilinx stuff too |
| 20:13.21 | vmaster | ah, i've read about it in the ep93xx backlog |
| 20:43.56 | [g2] | vmaster do you support XScale at all ? |
| 20:44.09 | *** join/#openjtag nbd (n=nbd@openwrt/developer/nbd) |
| 20:44.37 | [g2] | nbd welcome |
| 20:44.57 | nbd | hi |
| 20:45.00 | [g2] | nbd do you know lennert or vmaster ? |
| 20:45.20 | nbd | no |
| 20:45.26 | [g2] | lennert pushes about 1K things to l-a-k every day |
| 20:45.37 | lennert | hi nbd |
| 20:45.54 | nbd | hi lennert |
| 20:46.00 | [g2] | I think he's maintaining several arches/machines in the ARM kernel |
| 20:46.23 | [g2] | vmaster is the author of the openocd jtag software |
| 20:46.23 | lennert | yeah, some |
| 20:46.51 | vmaster | [g2]: xscale is partly working, i.e. most functionaly is there, but needs some cleanup |
| 20:46.57 | [g2] | lennert and and I are playing with a JTAG adapter and I'm talking vmaster about supporting it with openocd |
| 20:47.03 | vmaster | s/functionaly/functionality/ |
| 20:47.24 | [g2] | vmaster nbd has a sleeping board |
| 20:47.44 | [g2] | it's and ixp4xx and he'd like to replace the bootloader |
| 20:48.17 | vmaster | what type of flash is on this board? if it's a nor flash, jtag-tools might be the best choice |
| 20:48.37 | [g2] | he's got a parallel adapter depending on the kind he might be able to pull the flash/memory controller/gpio/serial settings via JTAG |
| 20:48.47 | [g2] | he's reflashed with openwince |
| 20:48.55 | vmaster | yeah, that's what i mean |
| 20:48.58 | vmaster | and it didn't work? |
| 20:49.05 | nbd | i don't have a working redboot image |
| 20:49.17 | nbd | and the original boot loader (rgloader) boots, but refuses to start images |
| 20:49.25 | [g2] | oh it works, but he's trying to build a new RedBoot replacement |
| 20:49.56 | vmaster | and you'd like to read the configuration registers using jtag? |
| 20:50.01 | nbd | yeah |
| 20:50.07 | [g2] | that's what I suggested |
| 20:50.11 | vmaster | do you have access to a windows host? |
| 20:50.31 | nbd | no |
| 20:51.11 | nbd | could wine maybe do it? |
| 20:51.12 | vmaster | does your parallel adapter carry both reset lines? |
| 20:51.17 | nbd | yes |
| 20:51.21 | nbd | i patched openwince for that |
| 20:51.26 | nbd | because it wouldn't work without |
| 20:51.54 | vmaster | i've been thinking about the macraigor software, but not sure if that's going to work with wine |
| 20:52.12 | vmaster | does your adapter follow the wiggler layout? |
| 20:52.22 | nbd | i think it's a lattice style cable |
| 20:52.53 | nbd | i got it without any instructions or description |
| 20:53.15 | nbd | i use the lattice driver in openwince (with an added line for the other reset) |
| 20:54.54 | vmaster | let me check the openwince pin assignment |
| 20:55.43 | nbd | i have it here: |
| 20:56.17 | nbd | tdi -> 0, tck -> 1, tms -> 2, srst->3, trst -> 4, tdo -> 6 |
| 20:58.39 | vmaster | uhm, that's the jtag side? |
| 20:59.05 | vmaster | what i meant was the parport side |
| 20:59.05 | nbd | jtag -> parport pin |
| 20:59.08 | vmaster | ah |
| 20:59.09 | vmaster | ok |
| 20:59.48 | vmaster | they have tdo on a data pin? |
| 20:59.59 | vmaster | anyway, it's not going to work with the macraigor software |
| 21:00.03 | lennert | tdo on a data pin, that's weird |
| 21:00.36 | nbd | that's how i got it and it works for flashing with openwince :) |
| 21:05.03 | vmaster | heh, ok, got it, it's status bit 6 |
| 21:06.25 | vmaster | you could try the OpenOCD, but I have absolutely no idea what's missing for IXP4xx support |
| 21:06.49 | nbd | ok |
| 21:06.50 | vmaster | i suppose it's big-endian? |
| 21:06.55 | nbd | yes |
| 21:07.50 | vmaster | is any of the signals inverted? |
| 21:09.04 | nbd | i don't think so |
| 21:09.36 | vmaster | you said you added srst? what do you output on it? |
| 21:10.38 | nbd | there's a suggested sequence for bringing up the jtag port in one of the intel docs |
| 21:10.47 | nbd | i just added it to the init in openwince |
| 21:16.38 | nbd | hacking in support for my cable right now.. |
| 21:16.45 | vmaster | where? |
| 21:17.16 | vmaster | in the openocd? |
| 21:17.35 | nbd | yes |
| 21:17.49 | vmaster | i've just committed my latest working tree to the svn repository, which adds the lattice cable |
| 21:17.54 | vmaster | you need branches/xscale/ |
| 21:18.01 | nbd | ah, thanks |
| 21:18.02 | vmaster | there's no xscale support in the trunk |
| 21:18.15 | vmaster | i kept that separate, so it didn't affect the working arm7/9 stuff |
| 21:19.28 | nbd | doesn't seem to set srst |
| 21:19.35 | nbd | or is that handled differently? |
| 21:20.14 | nbd | never mind |
| 21:20.17 | nbd | looked in the wrong place |
| 21:20.18 | vmaster | { "lattice",0x40, 0x10, 0x04, 0x02, 0x01, 0x08, 0x00, 0x00, 0x18 }, |
| 21:20.33 | nbd | yeah, found it now |
| 21:20.34 | vmaster | the last byte is the initialization value, setting both resets high |
| 21:21.09 | vmaster | what ixp is on your board? |
| 21:22.01 | nbd | ixp425 |
| 21:23.34 | nbd | chip says ixp425ab |
| 21:25.04 | vmaster | http://mmd.ath.cx/ixp425_lat.cfg |
| 21:25.18 | vmaster | configure the openocd with --enable-parport |
| 21:25.34 | [g2] | hmm that's the A stepping |
| 21:25.34 | nbd | configured and compiled |
| 21:25.40 | vmaster | you should be able to run it with openocd -f ixp425_lat.cfg |
| 21:25.51 | nbd | i get http 403 |
| 21:26.09 | vmaster | ok, now? |
| 21:26.12 | nbd | yes |
| 21:26.54 | vmaster | if it fails with "error validating scan chain" you have a problem with the jtag setup |
| 21:27.07 | nbd | it says cannot open device |
| 21:27.27 | vmaster | you need root privileges for the direct i/o access |
| 21:27.38 | vmaster | you could use ppdev, too (--enable-parport_ppdev) |
| 21:27.45 | vmaster | but that's slower, therefor it's off by default |
| 21:27.54 | nbd | i am root |
| 21:27.59 | nbd | and direct access works with openwince |
| 21:28.13 | vmaster | can you paste me the output? |
| 21:28.45 | nbd | huh? i recompiled and it works |
| 21:28.55 | nbd | now i get this: |
| 21:28.55 | nbd | Error: xscale.c:1269 xscale_deassert_reset(): couldn't stat() target/xscale/debug_handler.bin: No such file or directory |
| 21:28.59 | nbd | but it's still running |
| 21:31.33 | vmaster | is the executable in src/? |
| 21:31.40 | nbd | yes |
| 21:32.06 | vmaster | is there a src/target/xscale/debug_handler.bin? |
| 21:32.06 | nbd | ah |
| 21:32.10 | nbd | i should run it from src ... :) |
| 21:32.15 | vmaster | ah, yeah, sorry |
| 21:32.21 | vmaster | it's very much work in progress |
| 21:32.28 | nbd | no problem |
| 21:32.29 | vmaster | you're the first one except me to run the xscale stuff ;) |
| 21:32.33 | nbd | :) |
| 21:32.50 | nbd | seems normal now |
| 21:32.59 | vmaster | does it stop after some time? |
| 21:33.10 | vmaster | or is there continous output? |
| 21:33.15 | nbd | it's sleeping |
| 21:33.18 | nbd | just one line of output |
| 21:33.24 | vmaster | ah, run with -d |
| 21:33.31 | vmaster | you can exit with "x <enter>" |
| 21:34.09 | nbd | it doesn't stop |
| 21:34.21 | vmaster | ok, that's bad |
| 21:34.30 | vmaster | the debug_handler is currently compiled for LE |
| 21:34.34 | nbd | i'll make a paste of what's running in an endless loop |
| 21:34.47 | nbd | http://pastebin.ca/229684 |
| 21:35.29 | vmaster | the debug_handler needs byteswapping on BE then |
| 21:35.50 | vmaster | problem is that i'm in a hurry |
| 21:36.52 | nbd | should i recompile the thing or find a program to simply byteswap it? |
| 21:37.33 | vmaster | the build script is in the target/xscale directory |
| 21:37.38 | vmaster | recompiling might be easiest |
| 21:37.51 | nbd | ok |
| 21:37.58 | vmaster | gotta run now, i'll be back in about 2 hours |
| 21:39.27 | nbd | the linker script is missing |
| 21:39.35 | nbd | ok, we can continue later |
| 22:03.25 | *** join/#openjtag rwhitby (n=rwhitby@nslu2-linux/rwhitby) |
| 23:28.31 | *** join/#openjtag dwery (n=dwery@nslu2-linux/dwery) |
