| 03:57.01 | *** join/#openjtag purl (i=ibot@pdpc/supporter/active/TimRiker/bot/apt) |
| 03:57.01 | *** topic/#openjtag is This is the place to discuss JTAG and Bootloaders |
| 10:34.24 | *** join/#openjtag vmaster_ (i=vmaster@p549B7707.dip.t-dialin.net) |
| 12:11.05 | key2 | hey |
| 12:11.20 | key2 | someone knows a chip that does h264 (mpg4) codec ? |
| 12:30.49 | *** join/#openjtag prpplague (n=billybob@72.22.131.223) |
| 16:18.47 | *** join/#openjtag ka6sox (n=ka6sox@nslu2-linux/ka6sox) |
| 17:32.52 | *** join/#openjtag ka6sox (n=ka6sox@nslu2-linux/ka6sox) |
| 21:49.54 | *** join/#openjtag Griffon26 (n=griffon2@gentoo/developer/griffon26) |
| 21:49.59 | Griffon26 | hey guys |
| 21:50.22 | Griffon26 | hey p2-mate... long time no see =] |
| 21:51.20 | Griffon26 | I was investigating a low-cost, easy and fast DIY EJTAG probe and I stumbled across the site you guys set up |
| 22:01.46 | Griffon26 | Anyone know if a JTAG adapter board using the FT2232 was ever built? |
| 22:01.59 | Griffon26 | I read about plans for it in an irc log of july last year |
| 22:15.13 | vmaster | Griffon26: I'm using it for ARM7/9 and XScale debugging |
| 22:15.46 | vmaster | you can even get one prebuilt from Amontec or (soon) from Olimex (sparkfun in the US) |
| 22:16.20 | Griffon26 | and this is using the DLP-2232M? |
| 22:16.39 | vmaster | they're both using the FT2232C, and I have a homebrew device with the DLP-2232M, yeah |
| 22:17.01 | vmaster | you basically only need level-shifters for non-5V targets |
| 22:17.27 | Griffon26 | yeah, I read about that |
| 22:18.18 | Griffon26 | do you have something I can google for to find prices? |
| 22:18.55 | vmaster | Amontec's JTAGkey is rather expensive (www.amontec.com, ~150$), but the Olimex dongle is supposed to sell for around 60$ |
| 22:19.07 | vmaster | though it's not available yet, but should be mid-july |
| 22:19.18 | vmaster | either way, you'll have to write software for the EJTAG stuff |
| 22:19.40 | Griffon26 | yeah.. as long as full specs are available, that shouldn't be a problem |
| 22:20.23 | vmaster | afaik EJTAG is well documented, and the FT2232C comes with a detailed description of the MPSSE (multi-protocol synchronous serial engine) used for JTAG |
| 22:20.41 | vmaster | the mpsse stuff is in an appnote available from ftdichip.com |
| 22:20.48 | Griffon26 | first I have |
| 22:21.08 | Griffon26 | let's hope it becomes a trend |
| 22:21.15 | Griffon26 | JTAG probe prices are outrageous |
| 22:21.49 | vmaster | yeah... but the money really isn't in the hardware, but the software driving it |
| 22:21.59 | Griffon26 | I was wondering though... is the speed limit in USB or something else? because it's only using full speed |
| 22:22.10 | Griffon26 | vmaster: I don't want the software... and I can't get a probe without it =] |
| 22:22.37 | Griffon26 | so anyway, I'm trying to get together an open probe and open software |
| 22:22.50 | vmaster | the FT2232C itself is more limitng than the USB 1.1 |
| 22:23.27 | vmaster | on my arm7/9 systems, i can get about 120kb/s download to target RAM, which equals about 1.5MHz effective TCK rate |
| 22:24.01 | Griffon26 | that's a shame |
| 22:24.31 | vmaster | oh well, a Wiggler does ~300kHz, so it's at least something |
| 22:24.44 | Griffon26 | definitely better than a wiggler =] |
| 22:25.28 | Griffon26 | atm I'm working on a bootloader (I work on embedded sw in my job) and it can't go fast enough |
| 22:27.41 | Griffon26 | I wonder if FTDI is working on a Hi-speed version |
| 22:27.59 | vmaster | mhh, i guess that wouldn't change too much |
| 22:28.25 | vmaster | if you want to achieve a lot more than the 120kb/s on an ARM7 for example you'd have to shift more logic into the JTAG probe |
| 22:28.43 | Griffon26 | how so? |
| 22:29.01 | vmaster | because often you're waiting for data to transmit back to the host, and even with USB 2.0 you have 125us latency |
| 22:29.31 | vmaster | like i have to poll some bits to see if the core completed the current operation |
| 22:30.11 | Griffon26 | I must admit, I have not found much about what a download is really doing with JTAG. Do you have any docs on this? |
| 22:30.47 | Griffon26 | IIRC, downloading stuff to memory was part of EJTAG, not JTAG (at least for MIPS), is that right? |
| 22:30.55 | vmaster | it really depends on your target architecture - i can only speak for the ARM7/9 and XScale (both are rather different) |
| 22:31.19 | vmaster | isn't EJTAG just what travels through JTAG? |
| 22:31.33 | Griffon26 | there are some extra commands |
| 22:31.41 | Griffon26 | same pins |
| 22:31.48 | Griffon26 | although... |
| 22:32.22 | AchiestDragon | with jtag , you should be able to do tasks like , programming the device , boundry scan this gives you state info about the pins on the device ,, with cpus you should be able to get at the debug functions through jtag |
| 22:34.56 | vmaster | i just checked the EJTAG specs, and EJTAG really uses the JTAG TAP (test access port) to provide the debug functionality |
| 22:35.00 | vmaster | so it's more a naming issue |
| 22:35.09 | Griffon26 | got it... jtag has only 4 mandatory instructions and 6 optional ones |
| 22:35.21 | Griffon26 | ejtag has more instructions for accessing the bus of the device |
| 22:36.00 | vmaster | yeah, but that's just what they all do - noone's using the mandatory JTAG instructions for debugging |
| 22:36.33 | Griffon26 | that just means that data transfer to memory is always device specific, right? |
| 22:36.38 | vmaster | but the mode of operation remains the same, i.e. you select a JTAG instruction, and serially scan data into the device in Shift-DR |
| 22:36.41 | vmaster | right |
| 22:37.11 | Griffon26 | so what kind of communication does it involve for arm? |
| 22:37.25 | Griffon26 | lots of acks to wait for? |
| 22:39.23 | vmaster | on the ARM you have access to the data/instruction bus - you scan an instruction in, move through Run-Test/Idle to clock the core, so the instruction is "fetched", and then clock the instruction through the pipeline |
| 22:39.44 | vmaster | when for example a store-multiple instruction is in the execute stage, you can read the register content from the databus |
| 22:40.19 | vmaster | and for memory accesses, you scan in the desired load/store, make the core synchronise back to the memory clock, and wait for it to reenter debug state |
| 22:41.00 | vmaster | due to memory wait states, cache effects, and limitations on when the core might switch clocks, you don't know when it's back in debug state, so you have to poll |
| 22:41.11 | Griffon26 | you mean you have an ack for each word? |
| 22:41.27 | vmaster | you can read/write 14 words at a time |
| 22:41.35 | vmaster | so you have on ack for 56 byte |
| 22:41.56 | Griffon26 | ok |
| 22:42.20 | vmaster | you can also pretend that the core is always going to be faster than your JTAG interface, but that only holds when the processor is about ten times faster than the JTAG clock |
| 22:42.58 | vmaster | and Philips ARM's for example start with a ~14MHz crystal |
| 22:43.11 | vmaster | so there are times when you have to poll anyway |
| 22:43.59 | AchiestDragon | although the max jtag rate on something like the ppc is 1/16th that of the cpu clock |
| 22:45.39 | vmaster | yeah, there are all kinds of restrictions, but my point was that you can't avoid polling in some cases |
| 22:45.46 | AchiestDragon | but at 1.6Ghz thats a 100mhz jtag clock |
| 22:46.50 | AchiestDragon | i have not looked but wonders what the spec is for the intel and amd chips jtag |
| 22:47.02 | AchiestDragon | if they have it |
| 22:48.07 | vmaster | Griffon26: you can find my ARM7/9 (and soon XScale) debugger (oss) together with my thesis paper on ARM7/9 debugging at http://openocd.berlios.de/web/ - the JTAG layer would be suitable for EJTAG, too |
| 22:48.31 | Griffon26 | ah, ok, that would be nice *bookmark* |
| 22:48.37 | Griffon26 | what license btw? |
| 22:49.12 | vmaster | GPL |
| 22:49.55 | vmaster | the thesis documents an old version of the code, which has seen major improvements, but the theory remains the same |
| 22:50.26 | Griffon26 | thumbs up |
| 22:59.16 | Griffon26 | thanks for your insights. Bye for now |
| 22:59.35 | vmaster | yeah, cya... i'm off, too |