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| 03:18.18 | *** join/#openjtag davidc___ (n=davidc__@S01060002b360aacd.vc.shawcable.net) |
| 03:18.38 | davidc___ | anyone here familiar with OpenOCD / DLC5 Jtag + Arm? |
| 03:21.58 | davidc___ | or any arm embeddedICE jtag stuff? |
| 03:32.08 | ka6sox | the guy who did it is vmaster I think |
| 03:33.32 | davidc___ | ok, thanks - I'm trying to do jtag bringup on an iPod - and having mixed success - trying to figure out if its due to the weird processor, a bad cable connection, a faulty board or sw bugs... |
| 03:34.06 | davidc___ | I can do some things - aka grab regs, soft reset [sometimes], step [if it feels like it] - but any attempt to read a memory word just results in a timeout |
| 03:34.17 | davidc___ | and I know the comms are ok because all the regs make sense. |
| 03:34.53 | davidc___ | aka - PC in the 0x40000000 / 0x20000000 range - which is where it should be [or in 0x0 range if I start it just outta reset] |
| 03:36.34 | ka6sox | k |
| 03:37.11 | davidc___ | if anyone has any ideas where to go from here, I'd be happy to hear them :P - my next step is gonna be an LA + a scope to see if the signalling is sane |
| 03:37.54 | ka6sox | might be the best answer |
| 03:53.31 | davidc___ | eh, and vmaster's the guy that wrote openocd? |
| 03:53.56 | ka6sox | I think so |
| 03:54.06 | davidc___ | k, I'll bug im next time he's not idle |
| 06:22.05 | vmaster | heh, yeah, i know, sleep is for the weak and such, but he came asking at 5:30am |
| 06:22.21 | ka6sox | sleep is highly overrated |
| 06:26.50 | vmaster | yeah, that's what i've been told, but i still feel highly addicted to it - like, every day, at the same time, and if i don't get it, i'm really angry |
| 06:29.12 | ka6sox | makes 2 of us |
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| 08:07.18 | davidc__[2] | vmaster: I'm around |
| 08:07.51 | davidc__[2] | vmaster: any thoughts? |
| 08:09.59 | davidc__[2] | bah, missed him I guess ;) |
| 10:25.18 | *** join/#openjtag vmaster_ (i=vmaster@p549B6810.dip.t-dialin.net) |
| 10:53.38 | vmaster_ | davidc__[2]: i'm back |
| 10:54.31 | vmaster_ | davidc__[2]: in case we keep missing each other: there's a forum for OpenOCD at sparkfun, and you can contact me by mail at Dominic.Rath <at> gmx.de |
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| 13:09.45 | M1a4U | lut |
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| 16:05.37 | davidc__[2] | vmaster - I'll give it one more shot on IRC - I'll try to be around about the time that you posted yesterday |
| 16:17.26 | vmaster | davidc__[2]: heh, very unlikely - that was 8:15am, and i doubt i'll be up at that time tomorrow - excessive drinking is scheduled in 45 minutes ;) |
| 16:18.21 | davidc__[2] | vmaster: yay! I'm around |
| 16:18.22 | vmaster | davidc__[2]: make sure you have the latest OpenOCD sources (/trunk from svn), and run the OpenOCD with "-d -l <logfile>", and send me the log output |
| 16:18.46 | davidc__[2] | yep, did a svn checkout |
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| 16:18.51 | *** mode/#openjtag [+o ChanServ] by irc.freenode.net |
| 16:19.01 | davidc__[2] | gimme 10 secs and I'll get that for ya |
| 16:19.17 | vmaster | hold on |
| 16:19.26 | vmaster | the dlc5 lacks the nSRST line, right? |
| 16:19.34 | davidc__[2] | yup |
| 16:19.40 | davidc__[2] | just got the jtag wired |
| 16:19.53 | vmaster | make sure you have "reset_config trst_only" |
| 16:19.53 | davidc__[2] | the other issue is that there are two cores on this chip - one after the other in the jtag chain |
| 16:20.06 | davidc__[2] | trst? - doesn't have that line either |
| 16:20.20 | davidc__[2] | no HW reset - with the exception of me touching a testpoint ;) |
| 16:20.22 | vmaster | oh, that use "reset_config none" |
| 16:20.27 | davidc__[2] | yeah, thats what I've got |
| 16:20.28 | vmaster | *then |
| 16:20.46 | davidc__[2] | the reset isn't whats driving me nuts though - its the insane single stepping + its refusal to grab memory words |
| 16:20.57 | vmaster | the first jtag_device corresponds to the device closest to TDO |
| 16:21.06 | davidc__[2] | vmaster: yup |
| 16:21.20 | vmaster | what arm cores are on your chip? |
| 16:21.26 | davidc__[2] | its two identical arm cores - arm7tdmis |
| 16:21.31 | davidc__[2] | er, 's |
| 16:21.42 | vmaster | mhh, ok |
| 16:21.47 | vmaster | well, then run it, and send me test output |
| 16:21.57 | davidc__[2] | will do |
| 16:22.35 | davidc__[2] | btw - is there any way to attach to both cores simultaneously? I'm also considering that one core might see the other as locked + reset it |
| 16:22.46 | davidc__[2] | as I know theres interaction between the two going on in the bootloader |
| 16:28.25 | vmaster | mhh, currently that would be only possible if you were in control of both nTRST and nSRST |
| 16:28.46 | vmaster | i think i could enhance the OpenOCD so it halts both simultaneously |
| 16:29.57 | davidc__[2] | I don't think it'd have to be identical - just so I can halt em one after the other |
| 16:30.02 | davidc__[2] | then try single stepping one without the other interfering |
| 16:31.24 | vmaster | in theory that should be possible - use two "target" lines in the config, and switch between the targets on the telnet interface |
| 16:31.39 | vmaster | but i've never tested the OpenOCD with more than one core |
| 16:31.45 | vmaster | so there might be some bugs lurking |
| 16:31.54 | vmaster | okay, i'm sorry, but i gotta run now |
| 16:32.00 | davidc__[2] | ah, tried that - got something about could not bind socket |
| 16:32.03 | davidc__[2] | no problem |
| 16:32.10 | davidc__[2] | I'll go source diving for that bug /w the socket |
| 16:32.19 | davidc__[2] | make a patch |
| 16:32.32 | vmaster | hmm, it could be the code that allocates different sockets for the gdb servers |
| 16:32.37 | davidc__[2] | log here: http://david.carne.ca/ocd.log |
| 16:32.46 | davidc__[2] | transcript here http://david.carne.ca/ocd.transcript |
| 16:33.02 | davidc__[2] | and the result for mdw 0 is definitely wrong |
| 16:33.13 | davidc__[2] | takes about 10 seconds too |
| 16:33.27 | davidc__[2] | http://david.carne.ca/openocd.cfg is the config |
| 16:33.37 | davidc__[2] | if ya get a chance to look at it - that'd be great, if not - no worries |
| 16:33.40 | davidc__[2] | Many thanks! |
| 16:34.09 | vmaster | okay, i'll look at it tomorrow, cya |
| 16:34.23 | davidc__[2] | 'later |
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