| 00:00.43 | AchiestDragon | opps |
| 00:00.52 | AchiestDragon | 1 min theres an error on that |
| 00:01.54 | *** join/#openjtag beewoolie-afk (n=beewooli@206.124.142.26) |
| 00:03.38 | AchiestDragon | http://www.whipy.demon.co.uk/wiggler.pdf , fixed this should cope with working with ether a 3.3 or 5v dio and translate for 1.2v to 5v on the jtag side with out the need for worrying about vref load or voltage selection |
| 00:05.27 | AchiestDragon | the 74hc05 is avalable in 0.1" dip so could easaly be built on stripboard |
| 00:06.55 | AchiestDragon | transistor is a bc108 , bc 548 a 2n222 is sutable also should be good to 24mhz |
| 00:12.59 | AchiestDragon | ka6sox: ping |
| 00:16.21 | AchiestDragon | hopes i got the transistor number right , its a npn and cannot remeber if thats the bc547 or 548 form memory |
| 00:17.26 | AchiestDragon | checks :) yes is ok |
| 00:18.21 | AchiestDragon | <PROTECTED> |
| 00:22.39 | *** join/#openjtag ByronT-Away (n=byron-po@nslu2-linux/ByronT) |
| 00:25.52 | AchiestDragon | the 74hc05 has a 10nS delay so it will switch to a max of 30mhz so should be kool at 15mhz |
| 01:14.25 | ka6sox | AchiestDragon, pong |
| 01:16.00 | AchiestDragon | the wigler sch ? thoughts |
| 01:17.14 | ka6sox | they typically use a '244 |
| 01:18.35 | AchiestDragon | <PROTECTED> |
| 01:20.40 | ka6sox | I just used 7407's once |
| 01:29.42 | AchiestDragon | think most of the 244 based ones are derived from people moding the 244 based pargramers rather than a proper understanding of level shifters |
| 01:31.06 | ka6sox | most likely |
| 02:04.22 | AchiestDragon | the 244 design will cause problems if the jtag levels are suposed to be 2.5v and the 244 is a parallel port version opperating at 5v |
| 02:07.38 | AchiestDragon | well just checking my parts store , not got any of them in stock , will sort an order out on the morning so i can get one built up |
| 02:12.44 | AchiestDragon | bed for me , nn |
| 02:13.58 | ka6sox | nn |
| 09:18.42 | *** join/#openjtag purl (i=ibot@pdpc/supporter/active/TimRiker/bot/apt) |
| 09:18.42 | *** topic/#openjtag is This is the place to discuss development of Open JTAG tools and Bootloaders - http://www.openjtag.net/ |
| 09:43.00 | AchiestDragon | yawn |
| 09:43.52 | vmaster | AchiestDragon: nSRST should be open-collector |
| 09:43.57 | vmaster | ah, and morning |
| 09:44.18 | AchiestDragon | k |
| 09:44.34 | AchiestDragon | then remove res5 |
| 09:45.03 | vmaster | nTRST probably, too |
| 09:45.08 | AchiestDragon | the 74hc05 all the outputs are open collector |
| 09:45.12 | vmaster | ah, ok |
| 09:46.32 | *** join/#openjtag dyoung-away (n=dyoung@nslu2-linux/dyoung) |
| 09:46.44 | AchiestDragon | the pulup is ok on nTRST as is in most cases though |
| 09:47.54 | vmaster | yeah, i'm not really sure about that one, but ARM says it should be open collector |
| 09:51.07 | AchiestDragon | if the inputs all have pullups on the board that your testing then res1 to 5 could be ommited , |
| 09:52.25 | AchiestDragon | but there better left there for those boards that dont , it should not affect it if they are left , unless the logic level requied for jtag is diferent to vref that it should not be |
| 09:56.26 | AchiestDragon | farnell have a £20min order amount so need to get fill up the order with some other bits also |
| 10:10.21 | AchiestDragon | 74hc05 £0.22 resitors 10 at £0.012 cap already have but £0.02 transitor £ 0.07 connector £0.95 bit of stipboard £0.50 total £1.88 |
| 10:14.25 | AchiestDragon | and need the idc connectors and header for the end that connects to the ts72** dio port |
| 10:58.17 | *** join/#openjtag purl (i=ibot@pdpc/supporter/active/TimRiker/bot/apt) |
| 10:58.17 | *** topic/#openjtag is This is the place to discuss development of Open JTAG tools and Bootloaders - http://www.openjtag.net/ |
| 10:59.45 | AchiestDragon | should point out that only a 74hc05 or 74ac05 should be used for the dio at 3v3 a 74hct05 or 74ls05 ect will only operate from 5v logic , but the jtag end is fine with any to 1.2v logic |
| 11:36.42 | lennert | AchiestDragon: btw, i would really try putting the sdram on once chip select, that's much easier in software |
| 11:38.51 | AchiestDragon | unfortunaly theres a 64mb limit on the external addressing of the ep9302 that requires the rams to use the individual cs lines |
| 11:39.37 | AchiestDragon | in order to be able to address 256mb ram |
| 11:40.21 | lennert | right.. that sucks |
| 11:40.26 | lennert | we don't have discontigmem support at the moment |
| 11:42.14 | AchiestDragon | wonder if thats why someone on the ts7200 user list on yahoo was compling about mem usage only beeing a max of half what the board had |
| 11:42.35 | AchiestDragon | some months back now |
| 12:55.03 | *** join/#openjtag prpplague (n=billybob@72.22.146.238) |
| 12:59.17 | prpplague | ~seen beewoolie-afk |
| 12:59.28 | purl | beewoolie-afk <n=beewooli@206.124.142.26> was last seen on IRC in channel #openjtag, 1d 17h 54m 46s ago, saying: 'just returned from skiing.'. |
| 14:16.55 | *** join/#openjtag bullet (n=bullet@113.23.78.83.cust.bluewin.ch) |
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| 15:00.36 | *** join/#openjtag vmaster_ (i=vmaster@p549B6DE2.dip.t-dialin.net) |
| 15:26.11 | vmaster | cya, i'm gone till sunday |
| 15:27.06 | ka6sox | enjoy |
| 18:25.20 | *** join/#openjtag ByronT (i=byron-po@nslu2-linux/ByronT) |
| 22:07.06 | NAiL | Ok, now I've got a JTAG-cable |
| 22:07.27 | NAiL | But, is there any way to figure out which of the 5 inputs are what? |