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14:11.24 | lennert | http://www.embeddedarm.com/epc/ts7300-spec-h.htm |
14:11.33 | lennert | with a user-programmable fpga :) |
14:11.50 | AchiestDragon | :S seen it |
14:15.23 | AchiestDragon | still the same odd pc104 bus , the fpga part makes the board alot larger more like a 5.25" drive footprint rather than a 3.5" that the ts7200 is , if it was not for the fact that the ram on the fpga was realy for the video then it may be good for the jtag programmer |
14:17.01 | AchiestDragon | 2 ethernet and 10 rs232 ports though ? strange |
14:19.22 | AchiestDragon | since the hat as been shelved the one i am working on atm would probabaly be a better option than that |
14:20.26 | lennert | 'hat' ? |
14:21.38 | AchiestDragon | same 20Mhz ep9302 , with upto 4 64mb sdrams so a nice 256mb ram space , a 50 mhz bus not the slow pc104 thing and 124mm* 96mm pcb |
14:22.01 | AchiestDragon | hat the pcmcia version of the aztag |
14:22.49 | lennert | right |
14:23.06 | AchiestDragon | 200mhz rather not 20 |
14:23.16 | lennert | you know we're rewriting the cirrus ep93xx code, right? |
14:23.30 | AchiestDragon | yes |
14:29.11 | AchiestDragon | http://www.whipy.demon.co.uk/SBC.pdf |
14:30.58 | AchiestDragon | thers 4 ram and 2 flash chips , 2 rams on top and 2 on the underside , and one flash ontop and one on the under side |
14:36.31 | AchiestDragon | theres a modified version of the aztag board that stacks ontop , up to 6 boards could be stacked to give 96 chans at 150mhz or 48chans at 300mhz for the logic analizer functions |
14:38.13 | AchiestDragon | and should be able to sync the trigers between the boards |
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14:41.18 | AchiestDragon | the hat design wasshelved for 2 reasons , firstly a heat problem , that could only realy be solved by a type III pcmcia enclosure that is a custom item so too costly, second the cpld for the pcmcia cardbus would of needed 6 layers so more expence |
14:44.21 | AchiestDragon | and given the £35 each for the cable , it would of easaly toped the £250 and be more like $400 each for 10's of including assembly .5mm pitch bga's are a real pita to do in a toaster oven |
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15:06.00 | ka6sox | indeed |
15:06.41 | ka6sox | AchiestDragon, how close to the S3 is the 2C8? |
15:09.50 | AchiestDragon | 8256 LE's |
15:10.56 | AchiestDragon | suprised they did not use the ep2c20 thats got dubble |
15:11.11 | ka6sox | k |
15:11.57 | AchiestDragon | you would think that as there using it to drive video one ethernet and about 6 rs232 ports that theres any LE's left for the user |
15:12.38 | ka6sox | k |
15:13.42 | ka6sox | I might go away as I have to check out a WET11 for a customer here. |
15:16.44 | AchiestDragon | why they got the power plug placed in the middle of the front side of the board |
15:21.20 | ka6sox | am I still here? |
15:23.39 | AchiestDragon | :) |
15:24.56 | *** part/#openjtag dwery-away (n=dwery@nslu2-linux/dwery) |
15:30.13 | ka6sox | waking kidlet and getting him moving |
16:04.40 | NAiL | lennert: ping? |
16:05.30 | lennert | pong? |
16:06.00 | NAiL | You might be able to answer this :-) |
16:07.18 | NAiL | The DoC on the ds101 is on the ixp4xx exp bus (CS0), at 0x50000000. When ioremapped, it ends up at 0xc4855000. Trying to read 16-bit values from the ioremapped address gives me a page fault, while reading/writing 8-bit addresses work just fine... |
16:07.23 | NAiL | Got any idea why? |
16:13.24 | lennert | the expansion bus is configured for 8 bit accesses? :) |
16:19.06 | NAiL | I get the same when I've configured CS0 for 16bit too... |
16:19.12 | NAiL | (I think) ;) |
16:19.33 | lennert | how are you reading 16 bit values? |
16:19.49 | lennert | did you use ioremap_nocache ? |
16:20.04 | lennert | i.e. can you send me your code? :) |
16:20.40 | NAiL | right now I'm trying __raw_readw |
16:20.45 | NAiL | yes, using _nocache |
16:21.33 | NAiL | bit harder with the code part, since it's spread over several files ;) |
16:21.46 | lennert | just send me everything |
16:21.53 | lennert | i just got nand flash working on the ts7250 |
16:22.00 | lennert | so i have a fairly good idea of what's involved now |
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16:54.18 | NAiL | lennert: take a look at http://pastebin.com/565217 |
16:54.34 | NAiL | The hacked-together module I wrote to try to just detect the bugger |
16:54.51 | NAiL | the setup for CS0 is at the bottom, it's actually done in the machine setup |
16:56.08 | NAiL | (there's also a $100 bounty for whoever gets the DoC working on the DS101 ;) |
16:57.30 | NAiL | the working 2.4 sources are available, but they're messy. |
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17:53.10 | lennert | i don't have a ds101 ;) |
17:55.22 | lennert | ok, so which access segfaults? |
17:57.44 | lennert | NAiL: _why_ are you remapping 0x500000001 ? |
17:57.50 | lennert | NAiL: try mapping 0x50000000 |
17:57.55 | lennert | NAiL: right now it's just mapping zero |
17:58.02 | lennert | NAiL: and you're writing over your first page of ram |
18:15.23 | lennert | NAiL: ping? |
18:57.08 | NAiL | lennert: not 01, 0L |
18:57.19 | NAiL | or, 0l |
18:57.46 | NAiL | the first access segfaults on 16-bit access |
18:57.48 | lennert | right, hard-to-read font |
18:58.15 | lennert | 16bit read or write? |
18:58.22 | NAiL | read |
18:58.23 | lennert | you _are_ configuring cs0 correctly? |
18:58.31 | lennert | well |
18:58.34 | lennert | the first read is unaligned |
18:58.39 | lennert | junk += ReadDOC_(virtadr,0x1fff); |
18:58.50 | lennert | 0x1fff is not an aligned address |
18:58.52 | lennert | try 0x1ffe |
19:00.39 | NAiL | ok, uploading new kernel now |
19:00.45 | NAiL | takes a while with ymodem :P |
19:01.01 | NAiL | I *think* I'm configuring CS0 correctly |
19:01.08 | NAiL | look at the defines at the bottom |
19:02.04 | NAiL | *IXP4XX_EXP_CS0 = DS101_EXP_CS0_INIT; |
19:02.11 | NAiL | That is done during the board setup |
19:02.33 | NAiL | (this setup is identical to the 2.4-setup that works) |
19:03.12 | lennert | but 2.4 can read and write okay.. |
19:03.27 | NAiL | yes |
19:03.34 | NAiL | it didn't panic now |
19:03.41 | NAiL | but it still doesn't detect the chip |
19:03.45 | NAiL | (chipID is 0x0) |
19:03.48 | lennert | one step further :) |
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19:07.26 | NAiL | Any ideas on other steps to take? ;) |
19:07.36 | NAiL | The detection sequence should be correct |
19:07.48 | NAiL | (according to the old 2.4-driver that worked) |
19:07.58 | NAiL | (which happens to be a msys-driver) |
19:08.14 | NAiL | (which happens to be a *mess*) |
19:10.40 | NAiL | btw, regarding the cpld... There's nothing in the original kernel that appears to do anything with it |
19:10.58 | NAiL | so I'm not sure if it's connected to the flash at all |
19:11.20 | NAiL | the ixp can boot off the DoC, since it pushes redboot to memory itself |
19:11.29 | NAiL | "it" = the DoC |
19:12.14 | NAiL | (and redboot has a hacked-on driver to allow it to load the first partition for the kernel) |
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19:16.23 | NAiL | dwery: lennert gave me the obvious answer to the 16-bit kernel panic |
19:16.30 | NAiL | 19:57 < lennert> the first read is unaligned |
19:16.38 | dwery | doh! |
19:16.42 | NAiL | yes |
19:16.48 | dwery | I was pretty sure lennert was your man! |
19:17.03 | NAiL | (still not detecting it tho) |
19:17.22 | dwery | ask lennert :D |
19:17.29 | NAiL | heh |
19:17.37 | NAiL | I'm kinda bugging him |
19:17.47 | dwery | eheh |
19:21.02 | NAiL | unfortunately, neither of you have a ds101 to test on :( |
19:24.46 | dwery | $$$$$ |
19:25.18 | dwery | :-D |
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19:26.51 | NAiL | Currently, I am unemployed, so buying two ds101's are actually more than my monthly budget |
19:28.12 | NAiL | (ie, more than I get paid) |
19:29.40 | NAiL | otherwise, sending a ds101 or two would've been high priority ;) |
19:33.32 | dwery | eheh :) |
19:33.40 | dwery | we'll have to work out the problem remotely |
19:35.59 | NAiL | did you send the artop patch upstream btw? |
19:36.25 | dwery | not yet |
21:22.21 | lennert | NAiLzZz: if you get me a shell on your ds101 i can maybe debug it remotely |
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