irclog2html for #openjtag on 20060221

00:34.16*** join/#openjtag fishhead (i=rs485@unaffiliated/fishhead)
01:04.40*** join/#openjtag dyoung-away (n=dyoung@nslu2-linux/dyoung)
10:07.05*** join/#openjtag bullet (n=bullet@179.215.203.62.cust.bluewin.ch)
12:45.03*** part/#openjtag fishhead (i=rs485@unaffiliated/fishhead)
13:18.30*** join/#openjtag prpplague (n=billybob@72.22.131.136)
14:11.24lennerthttp://www.embeddedarm.com/epc/ts7300-spec-h.htm
14:11.33lennertwith a user-programmable fpga :)
14:11.50AchiestDragon:S   seen it
14:15.23AchiestDragonstill the same odd pc104 bus , the fpga part  makes the board alot larger more like a 5.25" drive footprint rather than a 3.5" that the ts7200 is  , if it was not for the fact that the ram on the fpga was realy for the video then it may be good for the jtag programmer
14:17.01AchiestDragon2 ethernet and  10 rs232 ports though ? strange
14:19.22AchiestDragonsince the hat as been shelved  the one i am working on atm would probabaly be a better option than that
14:20.26lennert'hat' ?
14:21.38AchiestDragonsame 20Mhz ep9302 , with  upto 4 64mb sdrams so a nice 256mb ram space , a  50 mhz bus not the slow pc104 thing  and  124mm* 96mm pcb
14:22.01AchiestDragonhat the pcmcia version of the aztag
14:22.49lennertright
14:23.06AchiestDragon200mhz rather not 20
14:23.16lennertyou know we're rewriting the cirrus ep93xx code, right?
14:23.30AchiestDragonyes
14:29.11AchiestDragonhttp://www.whipy.demon.co.uk/SBC.pdf  
14:30.58AchiestDragonthers 4 ram and 2 flash chips ,  2 rams on top and 2  on the underside  , and one flash ontop and one on the under side
14:36.31AchiestDragontheres a modified version of the aztag board that stacks ontop , up to 6 boards  could be stacked to give  96 chans at 150mhz or  48chans at 300mhz for the logic analizer functions  
14:38.13AchiestDragonand should be able to sync the trigers between the boards
14:39.31*** join/#openjtag ulf_k (n=ulf_kypk@p54BD8E7D.dip0.t-ipconnect.de)
14:41.18AchiestDragonthe hat design wasshelved for 2 reasons , firstly a heat problem , that could only realy be solved by a type III pcmcia enclosure that is a custom item so too costly, second the cpld for the pcmcia cardbus would of needed 6 layers so more expence
14:44.21AchiestDragonand given the £35 each for the cable , it would of easaly toped the £250 and be more like $400 each for 10's of  including assembly  .5mm pitch bga's are a real pita to do in a toaster oven
14:51.55*** join/#openjtag vmaster_ (i=vmaster@p549B5A9F.dip.t-dialin.net)
15:06.00ka6soxindeed
15:06.41ka6soxAchiestDragon, how close to the S3 is the 2C8?
15:09.50AchiestDragon8256 LE's    
15:10.56AchiestDragonsuprised they did not use the  ep2c20 thats got dubble
15:11.11ka6soxk
15:11.57AchiestDragonyou would think that as there using it to drive video one ethernet and about 6 rs232 ports that theres any LE's left for the user
15:12.38ka6soxk
15:13.42ka6soxI might go away as I have to check out a WET11 for a customer here.
15:16.44AchiestDragonwhy they got the power plug placed in the middle of the front side of the board
15:21.20ka6soxam I still here?
15:23.39AchiestDragon:)
15:24.56*** part/#openjtag dwery-away (n=dwery@nslu2-linux/dwery)
15:30.13ka6soxwaking kidlet and getting him moving
16:04.40NAiLlennert: ping?
16:05.30lennertpong?
16:06.00NAiLYou might be able to answer this :-)
16:07.18NAiLThe DoC on the ds101 is on the ixp4xx exp bus (CS0), at 0x50000000. When ioremapped, it ends up at 0xc4855000. Trying to read 16-bit values from the ioremapped address gives me a page fault, while reading/writing 8-bit addresses work just fine...
16:07.23NAiLGot any idea why?
16:13.24lennertthe expansion bus is configured for 8 bit accesses? :)
16:19.06NAiLI get the same when I've configured CS0 for 16bit too...
16:19.12NAiL(I think) ;)
16:19.33lennerthow are you reading 16 bit values?
16:19.49lennertdid you use ioremap_nocache ?
16:20.04lennerti.e. can you send me your code? :)
16:20.40NAiLright now I'm trying __raw_readw
16:20.45NAiLyes, using _nocache
16:21.33NAiLbit harder with the code part, since it's spread over several files ;)
16:21.46lennertjust send me everything
16:21.53lennerti just got nand flash working on the ts7250
16:22.00lennertso i have a fairly good idea of what's involved now
16:23.33*** join/#openjtag bullet (n=bullet@179.215.203.62.cust.bluewin.ch)
16:54.18NAiLlennert: take a look at http://pastebin.com/565217
16:54.34NAiLThe hacked-together module I wrote to try to just detect the bugger
16:54.51NAiLthe setup for CS0 is at the bottom, it's actually done in the machine setup
16:56.08NAiL(there's also a $100 bounty for whoever gets the DoC working on the DS101 ;)
16:57.30NAiLthe working 2.4 sources are available, but they're messy.
17:28.49*** join/#openjtag ByronT (n=byron-po@nslu2-linux/ByronT)
17:53.10lennerti don't have a ds101 ;)
17:55.22lennertok, so which access segfaults?
17:57.44lennertNAiL: _why_ are you remapping 0x500000001 ?
17:57.50lennertNAiL: try mapping 0x50000000
17:57.55lennertNAiL: right now it's just mapping zero
17:58.02lennertNAiL: and you're writing over your first page of ram
18:15.23lennertNAiL: ping?
18:57.08NAiLlennert: not 01, 0L
18:57.19NAiLor, 0l
18:57.46NAiLthe first access segfaults on 16-bit access
18:57.48lennertright, hard-to-read font
18:58.15lennert16bit read or write?
18:58.22NAiLread
18:58.23lennertyou _are_ configuring cs0 correctly?
18:58.31lennertwell
18:58.34lennertthe first read is unaligned
18:58.39lennertjunk += ReadDOC_(virtadr,0x1fff);
18:58.50lennert0x1fff is not an aligned address
18:58.52lennerttry 0x1ffe
19:00.39NAiLok, uploading new kernel now
19:00.45NAiLtakes a while with ymodem :P
19:01.01NAiLI  *think* I'm configuring CS0 correctly
19:01.08NAiLlook at the defines at the bottom
19:02.04NAiL*IXP4XX_EXP_CS0 = DS101_EXP_CS0_INIT;
19:02.11NAiLThat is done during the board setup
19:02.33NAiL(this setup is identical to the 2.4-setup that works)
19:03.12lennertbut 2.4 can read and write okay..
19:03.27NAiLyes
19:03.34NAiLit didn't panic now
19:03.41NAiLbut it still doesn't detect the chip
19:03.45NAiL(chipID is 0x0)
19:03.48lennertone step further :)
19:07.15*** join/#openjtag _AchiestDragon (n=dave@whipy.demon.co.uk)
19:07.26NAiLAny ideas on other steps to take? ;)
19:07.36NAiLThe detection sequence should be correct
19:07.48NAiL(according to the old 2.4-driver that worked)
19:07.58NAiL(which happens to be a msys-driver)
19:08.14NAiL(which happens to be a *mess*)
19:10.40NAiLbtw, regarding the cpld... There's nothing in the original kernel that appears to do anything with it
19:10.58NAiLso I'm not sure if it's connected to the flash at all
19:11.20NAiLthe ixp can boot off the DoC, since it pushes redboot to memory itself
19:11.29NAiL"it" = the DoC
19:12.14NAiL(and redboot has a hacked-on driver to allow it to load the first partition for the kernel)
19:12.47*** join/#openjtag dwery (n=dwery@nslu2-linux/dwery)
19:16.19*** join/#openjtag Sinclair73de (n=icechat5@p54A081A5.dip0.t-ipconnect.de)
19:16.23NAiLdwery: lennert gave me the obvious answer to the 16-bit kernel panic
19:16.30NAiL19:57 < lennert> the first read is unaligned
19:16.38dwerydoh!
19:16.42NAiLyes
19:16.48dweryI was pretty sure lennert was your man!
19:17.03NAiL(still not detecting it tho)
19:17.22dweryask lennert :D
19:17.29NAiLheh
19:17.37NAiLI'm kinda bugging him
19:17.47dweryeheh
19:21.02NAiLunfortunately, neither of you have a ds101 to test on :(
19:24.46dwery$$$$$
19:25.18dwery:-D
19:26.49*** part/#openjtag Sinclair73de (n=icechat5@p54A081A5.dip0.t-ipconnect.de)
19:26.51NAiLCurrently, I am unemployed, so buying two ds101's are actually more than my monthly budget
19:28.12NAiL(ie, more than I get paid)
19:29.40NAiLotherwise, sending a ds101 or two would've been high priority ;)
19:33.32dweryeheh :)
19:33.40dwerywe'll have to work out the problem remotely
19:35.59NAiLdid you send the artop patch upstream btw?
19:36.25dwerynot yet
21:22.21lennertNAiLzZz: if you get me a shell on your ds101 i can maybe debug it remotely
21:29.44*** join/#openjtag dyoung-away (n=dyoung@nslu2-linux/dyoung)

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