| 01:09.25 | [g2] | lennert I think it depends on which chips are used in the fattening |
| 01:10.18 | [g2] | I think if you switch from 8M8 to 16M8 the old RedBoot works, but you just don't see the extra memory |
| 01:11.17 | [g2] | switch to 128MB probably needs to have the memory controller configured differently |
| 01:11.29 | [g2] | ok... that was probably 8M16 to 8M16 |
| 01:11.34 | [g2] | doh! |
| 01:11.39 | [g2] | 8M16 to 16M16 |
| 01:14.06 | [g2] | roger |
| 01:14.17 | [g2] | 16M16 is the 64MB config |
| 01:14.28 | [g2] | 8M16 is the 32MB config |
| 01:15.30 | [g2] | so depending on whether he doubled stacked 16M16s or went to 32M16s wouild determine his memory config |
| 01:15.44 | [g2] | hopefully it's 4 8M16s :) |
| 01:15.48 | [g2] | per side |
| 01:21.09 | *** join/#openjtag vmaster_ (i=vmaster@p549B6401.dip.t-dialin.net) |
| 01:22.11 | AchiestDragon | ka6sox: ping |
| 01:23.19 | AchiestDragon | seen a potential problem with ep1220 's interface |
| 01:24.44 | AchiestDragon | its got a nice onboard local regulator for powering the jtag vcc line , but if trying to test or program most fpga or cpld devices there is a problem |
| 01:26.33 | AchiestDragon | the jtag vcc is the i/o vcc of the device beeing programed , so there is no support for actualy powering the device core logic , so guess that would be a problem , although |
| 01:27.29 | AchiestDragon | i am not shure if the core needs to be powered in order to run a boundry scan using the jtag ? |
| 01:30.21 | AchiestDragon | it should only affect its opperation where the board/device under test is getting its power via the jtag and is otherwise unpowered |
| 01:35.57 | AchiestDragon | there could be another potential problem in driving the vcc via jtag , that is load , if the circut beeing tested has a lot of logic also using the same onboard vcc source then the regulator we are using will overload |
| 01:36.25 | AchiestDragon | and ether burn out or brown out |
| 01:37.12 | AchiestDragon | and we only got about 500ma to 1A capacaty on the jtag cable |
| 01:39.23 | AchiestDragon | so hucking up the jtag to test a device on a unpowered p4 motherboard for example is out |
| 02:00.22 | *** join/#openjtag tom___ (n=tom@cpe-066-057-008-035.nc.res.rr.com) |
| 02:01.01 | tom___ | howdy |
| 02:10.39 | *** join/#openjtag tom___ (n=tom@cpe-066-057-008-035.nc.res.rr.com) |
| 02:12.29 | [g2] | ping tom___ ping |
| 02:12.59 | [g2] | that's crazy |
| 02:25.48 | AchiestDragon | disregard last comment , it dosent drive the jtag vcc |
| 02:32.19 | AchiestDragon | need a break from it , getting eyestrain |
| 03:17.03 | ka6sox | AchiestDragon, take a break....you deserve it. |
| 04:23.24 | ka6sox | Tiersten: I'm going to make the switch to mediawiki for openjtag. |
| 06:04.24 | *** join/#openjtag bullet (n=bullet@234.48.62.81.cust.bluewin.ch) |
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| 10:09.08 | lennert | ka6sox: i fixed another distortion bug, but there's still one left |
| 10:09.44 | lennert | ka6sox: (or two) |
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| 13:06.01 | lennert | www.digilentinc.com down for other folks here too? |
| 13:08.13 | wookey_ | yep |
| 13:08.37 | wookey_ | well, "Service Unavailable" |
| 13:08.45 | wookey_ | so something is working |
| 13:08.45 | lennert | yeah, here too |
| 13:08.54 | lennert | yeah, but not enough :) |
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| 15:41.52 | ka6sox | coffee makes the world go round. |
| 15:43.47 | lennert | indeed |
| 15:44.01 | ka6sox | got your messages. |
| 15:44.05 | lennert | great |
| 15:44.38 | ka6sox | how is school? |
| 15:44.54 | lennert | struggling with some concepts |
| 15:45.08 | lennert | but doing great otherwise, i'm way ahead of schedule |
| 15:46.36 | lennert | ka6sox: do you have the xupv2p board and a scope by any chance? :) |
| 15:48.59 | ka6sox | I have both but am in meetings this morning |
| 15:49.16 | lennert | okay |
| 15:49.21 | lennert | no hurry in any case |
| 15:49.25 | lennert | i'm working on the ethernet now |
| 15:49.39 | ka6sox | ethernet? |
| 15:49.44 | lennert | yeah |
| 15:49.47 | lennert | the ethernet port on the xupv2p |
| 15:49.52 | ka6sox | ah |
| 15:49.52 | lennert | there's a 10/100 on there |
| 15:49.59 | ka6sox | :) |
| 15:50.26 | ka6sox | Coffee's on.... |
| 15:50.31 | ka6sox | back in a bit |
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| 16:26.48 | AchiestDragon | <PROTECTED> |
| 17:31.25 | lennert | ka6sox: so how much would the pc104 s3 board be? |
| 17:32.30 | ka6sox | dunno yet...still designing. |
| 17:33.20 | lennert | okay |
| 17:33.43 | lennert | i'm training a friend in vhdl |
| 17:34.19 | ka6sox | I hope to know *soon* |
| 17:52.54 | AchiestDragon | fpga at $22 , ram $10 to 15 , 12* 74hc series chips at $4 a opamp $2 some resitors and caps so allow $10 and $15 for the pcb atm |
| 17:53.24 | AchiestDragon | theres the power regulators and fpga config circut to do |
| 17:55.05 | AchiestDragon | ho and £3+£4 *2 for the first jtag adaptor and £3 each for any others ( for the high speed connectors and cable |
| 17:55.56 | AchiestDragon | and allow $10 for the pc104 connector and headders used |
| 17:59.13 | AchiestDragon | so about $150 as a verry rough estimate , but should be less than that |
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| 20:21.41 | beewoolie | prpplague: patches? |
| 20:22.21 | prpplague | beewoolie: yea they are ready, but i've been doing buildroot cleanup all day, as i'm the defacto person for buildroot patches these days |
| 20:22.38 | prpplague | beewoolie: started with 187 cases in the bug/patch system this morning |
| 20:22.43 | prpplague | beewoolie: down to about 107 |
| 20:22.54 | beewoolie | prpplague: You're the IT guy for buildroot? |
| 20:23.54 | prpplague | beewoolie: looks that way |
| 20:24.03 | beewoolie | fascinating |
| 20:24.20 | beewoolie | Which target of yours has a problem with buffered flash writes? |
| 20:24.46 | prpplague | both the lh79520 and s3c2410 when using 16-bit wide flash access |
| 20:24.57 | beewoolie | Oh, yeah, and among your lh79520 designs, what signals are you using for enable flash writes? |
| 20:25.00 | prpplague | they both use the TE28F320 |
| 20:25.13 | beewoolie | So, do you think it's the chip? |
| 20:25.44 | prpplague | beewoolie: yea i would suspect it is since i have another s3c2410 board (the little chips) that doesn't seem to be bothered by it |
| 20:26.22 | beewoolie | Oh, so you mean that APEX doesn't work, but other software does. |
| 20:26.46 | beewoolie | And what anout the flash write enable lines ? |
| 20:28.35 | prpplague | one sec |
| 20:29.57 | prpplague | beewoolie: no i mean apex works with both boards, but the littlechips board with amd flash works fine with the buffered flash writes, but not with our board with the the intel flash |
| 20:30.14 | prpplague | beewoolie: the lines are connected identical |
| 20:30.19 | beewoolie | OK. Perhaps I have the algorithm wrong. |
| 20:30.41 | beewoolie | About the lines, the LPD boards have changed their schematics. I am trying to get an idea about why they may have done this. |
| 20:30.56 | beewoolie | Is the TE28F320 the intel chip? |
| 20:31.49 | prpplague | yea |
| 20:32.15 | prpplague | beewoolie: our layouts for the lh79520 board is based on the ref schematic from sharp |
| 20:34.00 | beewoolie | The old LPD design uses nMWE0. The new design uses a different line, but I need to get the updated schematic to verify. |
| 20:34.28 | beewoolie | It's a lame change for them to make on the sly. |
| 20:34.41 | beewoolie | I found out because a customer called with a problem writing to flash. |
| 20:37.45 | prpplague | beewoolie: yea, i've never been very happy with logic pd's professionanlism |
| 20:38.15 | beewoolie | I'll get the Intel data sheet and see what I can see. |
| 20:38.23 | prpplague | okie dokie |
| 20:39.09 | vmaster | you're having a problem with the TE28F320? |
| 20:39.36 | beewoolie | probably a software issue. It doesn't like by buffered write code |
| 20:40.17 | beewoolie | prpplague: I found a reference to this flash part that says it isn't CFI compliant. |
| 20:40.27 | beewoolie | what is the full part number of the chip you're using? |
| 20:41.11 | vmaster | that chip doesn't have a write buffer |
| 20:41.25 | vmaster | at least the TE28F320C3 i'm using doesn't have one |
| 20:41.26 | beewoolie | vmaster: that would explain the problem :-) |
| 20:41.55 | beewoolie | prpplague: So, are you sure that your chip has a write buffer? |
| 20:42.38 | beewoolie | [g2]: Do you remember how long it took to program redboot into flash using openwince's jtag? |
| 20:43.22 | prpplague | beewoolie: iirc it does not, thats why i requested the ability to turn it off in apex |
| 20:44.01 | beewoolie | Ah, OK. I thought it had one and the driver couldn't use it. |
| 20:44.23 | beewoolie | APEX only includes one write routine, for compactness. |
| 20:44.46 | prpplague | beewoolie: http://www.intel.com/design/flcomp/datashts/290645.htm |
| 20:49.09 | beewoolie | According to this, it is CFI compliant. The MTD thread must have been about a different part. |
| 20:49.40 | vmaster | the C3 is cfi compliant, the B3 isn't |
| 20:49.56 | prpplague | beewoolie: well it is cfi compliant but there are some querks |
| 20:50.32 | prpplague | beewoolie: as the cfi specs say that several of the registers don't require an address, however the intel one does |
| 20:50.44 | prpplague | beewoolie: so imho its not 100% cfi compliant |
| 20:51.02 | beewoolie | It seems to work aside from the write buffer issue. |
| 20:52.03 | beewoolie | I suppose it wouldn't be too much to ask that APEX checks for the write buffer and reports an error if there isn't one...it requires one. |
| 20:52.23 | vmaster | the write-buffer size field is correctly set to 0 |
| 20:52.29 | vmaster | you could just check for that |
| 20:53.02 | beewoolie | Right, it does that, but it doesn't cope with a zero value. |
| 21:09.17 | beewoolie | prpplague: OK. The buffered write routine will return an error if the chip doesn't support it. |
| 21:19.26 | prpplague | beewoolie: lovely |
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| 23:01.33 | beewoolie | I have a preliminary result with the JTAG flash writing code. |
| 23:01.44 | beewoolie | I'm able to write about 1K to flash every 1.45 seconds. |
| 23:02.16 | beewoolie | This translates into about 6.2 minutes for a 256K write. |
| 23:02.35 | beewoolie | Note that this is for a 32 bit wide flash bank comprised of two chips. |
| 23:02.47 | beewoolie | I'll be doing some testing on a slug pretty soon here. |
| 23:03.36 | beewoolie | also, this is using the ARM debug scan chain, instead of the BSDL boundary scan, and it is using the flash chip's buffered write mode. |
| 23:04.50 | beewoolie | I expect that the best performance will come from downloading a flash-write helper into cache memory, so that there is only one JTAG transaction per 32 bit write. |
| 23:13.41 | lennert | cheap pci fpga board: http://www.enterpoint.co.uk/moelbryn/raggedstone1.html |
| 23:13.57 | lennert | ideal candidate for high-speed jtagging ;-) |
| 23:14.40 | lennert | E100 or so |
| 23:19.15 | beewoolie | PCI is problematic. |
| 23:19.41 | beewoolie | lennert: it requires a chassis for installation. |
| 23:21.48 | lennert | people have PCs? |
| 23:22.39 | ka6sox | NO! could it be? |
| 23:22.48 | ka6sox | not a good candidate. |
| 23:23.00 | ka6sox | he he |
| 23:23.38 | lennert | i have 5 PCs in this room alone.. guess i'll pulling up the world average, hm? :-) |
| 23:23.58 | ka6sox | PCI has problems. |
| 23:24.25 | lennert | :-( |
| 23:29.20 | wookey_ | lennert: I want to be able to jtag from this laptop or other funky hardware if possible, not just from full-box PCs |
| 23:29.22 | beewoolie | lennert: I use a notebook for most of my work with a server, locked in the dungeon, for the heavy lifting. |
| 23:29.37 | beewoolie | yes, I have a PC. No, I'm not going to be plugging boards into it. |
| 23:29.41 | wookey_ | it is cheap, but I'd rather hope for something more flexible |
| 23:30.28 | wookey_ | And increasingly people have funky shuttle or EPIA boxes where the one valuable slot is already full of something |
| 23:32.42 | wookey_ | beewoolie 6 mins for 256K is not bad. (with parallel I'm getting 50K in 19 mins or thereabouts) |
| 23:33.11 | wookey_ | but I was hoping 'latest tech' could go even faster... |
| 23:33.16 | beewoolie | wookey_: What software? |
| 23:33.23 | wookey_ | jflash |
| 23:33.27 | beewoolie | wookey_: I'm working my way up to better code. |
| 23:33.39 | wookey_ | (well, jflash-balloon, but derived from intel's jflash |
| 23:33.45 | beewoolie | This is the first working code. It uses the ARM debug registers, so it only works on ARMv4. |
| 23:33.56 | beewoolie | Jflash isn't very graceful. |
| 23:34.07 | wookey_ | no 'primitive' seems about right |
| 23:34.11 | beewoolie | I hope to do much better with this naive (sort of) code. |
| 23:34.15 | beewoolie | :-) |
| 23:34.30 | wookey_ | I look forward to it |
| 23:34.33 | beewoolie | The Xscale is amenable to some very elegant solutions. |
| 23:34.42 | wookey_ | BTW how big is an APEX loader at the moment? |
| 23:34.50 | beewoolie | wookey_: Depends on the options. |
| 23:35.06 | beewoolie | You can get a version that is under 16 K if you disable most of the fancy stuff. |
| 23:35.13 | wookey_ | OK, with minimal options, but enough to download something better |
| 23:35.14 | beewoolie | The largest executables are about 60K. |
| 23:35.33 | beewoolie | wookey_: It is designed to fit into SRAM on the Sharp LH processors. |
| 23:35.34 | wookey_ | that sounds promising - the thing I liked about blob was that it was 19K |
| 23:36.02 | wookey_ | for bootldr we have a minimal one (56K) to jflash then serial-download a 200K full-featured version |
| 23:36.07 | beewoolie | It isn't 19K with all of the drivers. |
| 23:36.12 | wookey_ | whole process is rather slow |
| 23:36.28 | beewoolie | apex is full-featured at 60K. |
| 23:36.42 | beewoolie | Actually, I don't really know the size of the largest versoins. |
| 23:36.46 | beewoolie | It may only be about 50K. |
| 23:36.51 | wookey_ | OK - so is anyone threatening to do pxa support? |
| 23:37.08 | beewoolie | If I had HW, I'd support it. |
| 23:37.19 | beewoolie | Adding a new target isn't very difficult. |
| 23:37.33 | beewoolie | As long as it is ARM. |
| 23:37.46 | wookey_ | what does it need? memoory set-up code and what else? |
| 23:38.03 | beewoolie | How similar is it to IXP? |
| 23:38.16 | wookey_ | I'm not sure - I've not had much to do with IXP |
| 23:38.21 | beewoolie | The bulk of the changes are in the SDRAM and target init. |
| 23:38.23 | wookey_ | they both come from intel :-) |
| 23:38.25 | beewoolie | ...hang on... |
| 23:39.14 | beewoolie | The IXP has only a couple of files: |
| 23:39.46 | beewoolie | <PROTECTED> |
| 23:39.51 | beewoolie | A few. |
| 23:40.24 | beewoolie | You need a serial driver, a timer, pci is for pci setups, you can add a custom reset command, and the most work goes into the initialize code. |
| 23:40.38 | beewoolie | Gotta get the SDRAM inits right. |
| 23:40.56 | wookey_ | So if we sent you a board you'd add support? That's tempting |
| 23:41.12 | wookey_ | then we could concentrate on adding yaffs support |
| 23:41.12 | beewoolie | There are a couple of header files that help the nor flash driver as well as a couple of other drivers. |
| 23:41.28 | beewoolie | yaffs isn't hard, but I don't have anything with NAND flash ATM. I used to. |
| 23:41.44 | beewoolie | It would be a good thing for several targets. |
| 23:41.49 | wookey_ | yaffs read-only is less then 2K of code and we have an example |
| 23:42.03 | beewoolie | After all, there is a JFFS2 driver. YAFFS can't be much more difficult. |
| 23:42.11 | wookey_ | yaffs read-write is a bit more work, |
| 23:42.19 | wookey_ | yaffs is much simpler than JFFS2 |
| 23:42.31 | beewoolie | APEX doesn't do any FS writing. |
| 23:42.51 | beewoolie | It could, but I've never wanted to do all of that work. |
| 23:42.56 | wookey_ | OK - that'd be why it's small. How do you store a loaded image? |
| 23:43.07 | wookey_ | raw write? |
| 23:43.10 | beewoolie | What do you mean? |
| 23:43.25 | beewoolie | Most of the time, the loader isn't responsible for storing the boot image. |
| 23:43.35 | wookey_ | well if you upload a kernel it's handy if the bootloader can store it in flash |
| 23:43.47 | beewoolie | You can download the kernel from an available medium, and go. |
| 23:44.01 | wookey_ | the available medium is flash |
| 23:44.01 | beewoolie | It can do a simple write to NOR/NAND flash. |
| 23:44.20 | beewoolie | It doesn't have FS support for writing, EXT2, Jff2, FAT. |
| 23:44.27 | beewoolie | But it can read fine. |
| 23:44.27 | wookey_ | right - I understand |
| 23:44.40 | beewoolie | And it can list directories in EXT2 and JFFS2. |
| 23:44.57 | beewoolie | FAT would be nice, but I've been lazy about it. |
| 23:45.02 | wookey_ | yaffs write is useful because raw to NAND is unreliable |
| 23:45.11 | beewoolie | Don't I know it. |
| 23:46.13 | wookey_ | I'll try and find the time to take a proper look at this. I should seriously consider it, but finding the time to support strongarm/pxa will be difficult |
| 23:46.31 | beewoolie | Feel free to send HW :-) |
| 23:46.32 | wookey_ | I should be able to steal most of the code from other bootloaders :-) |
| 23:47.01 | beewoolie | Indeed. The task isn't really difficult. I wrote APEX because maintenance' is a bear with all of the boot loaders I've worked with. |
| 23:47.06 | wookey_ | we have balloons2 (SA1110), but balloon3 will be a while yet |
| 23:47.46 | wookey_ | or at least a while before we have one spare enough to send anywhere :-) |
| 23:48.41 | wookey_ | now - must get back to the task I was sent in March last year :-( |
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| 23:50.48 | key2 | AchiestDragon: anything new on the hardware ? |
| 23:54.49 | AchiestDragon | 1 min |