| 00:20.47 | vmaster | [g2]: parallel as in "PC parallel port"? |
| 00:25.20 | [g2] | vmaster yes Parallel on S3 |
| 00:25.35 | [g2] | lennert you get one free |
| 00:25.37 | [g2] | ;) |
| 00:27.23 | vmaster | i have a parallel port to cpld dongle here, and the limiting factor is the parallel port access times - even using epp accesses, you wont achieve more than 1 to 1.5 us per access |
| 01:19.28 | *** join/#openjtag vmaster_ (i=vmaster@p549B701B.dip.t-dialin.net) |
| 01:30.13 | [g2] | vmaster I think FPGA has it's own clock |
| 01:30.30 | [g2] | I'm pretty sure it runs at least at 8MHz |
| 01:30.36 | [g2] | for TCLK |
| 01:54.46 | *** join/#openjtag Tiersten (n=tman@nslu2-linux/Tiersten) |
| 02:49.03 | beewoolie-afk | [g2]: Neato. |
| 02:49.23 | beewoolie-afk | Is this the one that gateworks sells? |
| 02:49.48 | beewoolie-afk | lennert: Hey. The question I had was whether or not sid was good on the slug. |
| 02:50.45 | [g2] | beewoolie-afk not yet |
| 02:51.01 | [g2] | beewoolie-afk you're welcome to get one too you know |
| 02:51.08 | beewoolie-afk | Really? I'd like that. |
| 02:51.20 | beewoolie-afk | I'm making good progress on my JTAG code. |
| 02:51.22 | [g2] | well I sent you your last cable right ? |
| 02:51.28 | [g2] | heh |
| 02:51.41 | beewoolie-afk | I'm using the one from ka6sox at the moment because of the fly leads. |
| 02:51.49 | [g2] | ah |
| 02:51.56 | beewoolie-afk | But the one you sent is the only one I've used on the slug. |
| 02:52.04 | [g2] | nod |
| 02:52.23 | beewoolie-afk | My plan is to get this code working for the slug so we can flash over JTAG without having to wait over-night. |
| 02:52.28 | [g2] | Gateworks is writing up their API |
| 02:52.33 | beewoolie-afk | Excellent. |
| 02:52.44 | beewoolie-afk | So, yes. I'd like one, too. |
| 02:52.45 | [g2] | then we can compare APIs |
| 02:52.49 | beewoolie-afk | :-) |
| 02:53.19 | [g2] | and I'm sure they can probably do some FGPA tweaks if need be |
| 02:54.26 | beewoolie-afk | It would help prove the concept. |
| 02:55.56 | [g2] | prove which concept ? |
| 02:56.15 | beewoolie-afk | The protocol for handling JTAG scanning and testing. |
| 02:57.01 | beewoolie-afk | If the FPGA can be reprogrammed by someone like me, then I can evaluate protocol enhancements before committing other resources. |
| 03:11.12 | *** join/#openjtag ByronT (n=byron-po@nslu2-linux/ByronT) |
| 03:17.24 | [g2] | I'd think the FPGA could be reporgrammed |
| 03:17.37 | [g2] | clearly that'd be what we want |
| 03:18.09 | [g2] | get a default bitsteram (or what ever they are called) which conforms to the API |
| 03:18.28 | [g2] | and then we can reflash the flasher |
| 03:18.51 | [g2] | test or reset it back to the original |
| 03:19.17 | [g2] | they could come with the digilent cable which can reflash the flasher :) |
| 03:22.12 | beewoolie-afk | Sounds kinda dirty. |
| 03:31.25 | [g2] | well boot strapping is always dirty |
| 03:32.01 | [g2] | having a eeprom on the adapter with an option to override the loading is another option |
| 03:52.15 | *** join/#openjtag bullet (n=bullet@180.48.77.83.cust.bluewin.ch) |
| 04:17.56 | AchiestDragon | well ram bandwidth on the high speed adaptor is not going to be a problem , 16 bit read or write cycles of upto 167mhz , looks like its if the fpga will be able to drive it that fast |
| 04:24.27 | [g2] | AchiestDragon I dunno how big the BlockRAM is on the S3 |
| 04:24.36 | [g2] | I'd image stuff may be in there |
| 04:25.31 | AchiestDragon | thats not the block ram thats the external 32mb sdram chips max speed |
| 04:25.48 | [g2] | ah |
| 04:28.14 | AchiestDragon | if the fpga was fast enough that would allow it to burst the full 32mb at 2Ghz |
| 04:28.24 | AchiestDragon | on the jtag |
| 04:29.45 | AchiestDragon | but should easy cope with 40Mhz , maybe even upto 160Mhz |
| 04:29.46 | [g2] | That'd be sweet :) |
| 04:30.47 | AchiestDragon | it also would give us a 160Mhz 16bit logic analizer capability |
| 04:34.00 | AchiestDragon | a bit more usefull than a logic probe for debuging with |
| 05:01.08 | *** join/#openjtag velinp (n=velinp@c88-163.cable.netissat.bg) |
| 05:06.14 | velinp | goog morning from BG; ka6sox: ping |
| 05:07.49 | *** join/#openjtag ka6sox (n=ka6sox@nslu2-linux/ka6sox) |
| 05:08.36 | velinp | good morning from .bg :) ka6sox: ping |
| 05:08.45 | ka6sox | morning |
| 05:09.09 | velinp | hi, are you managing bob and wendy? |
| 05:09.39 | ka6sox | the base system but not the buildd..that is yoe. |
| 05:11.48 | velinp | ok, I was looking what the buildds are doing; (mine is stuck with doxygen_1.4.6-1; I noticed "vfork: Cannot allocate memory" on wendy, building gcj-4.0_4.0.2-6 |
| 05:12.46 | ka6sox | then its run out of Memory again...bob has been idle for 2 weeks. |
| 05:13.10 | velinp | so i though maybe more virtmem is necessary; on velnas i have 32 + 176; have any idea how much mem we shoud have ? |
| 05:13.19 | velinp | s/though/thought/ |
| 05:14.00 | ka6sox | we acutally put up about 512MB on Bob and it grunted thru building gcc |
| 05:14.28 | velinp | 512 swap not enough for gcc ? |
| 05:16.19 | ka6sox | nope |
| 05:16.48 | ka6sox | I think that eventually we used about 800MB |
| 05:17.33 | velinp | ok, i will setup 1G on velnas, in some file; btw, wouter fixed compilers, etc on velnas, but a reboot was necessary so that buildd starts again |
| 05:18.14 | ka6sox | okay I'll try restarting Bob |
| 05:20.10 | velinp | wouter said it should be safe |
| 05:21.12 | ka6sox | okay it restarted...takes a few minutes to start the process |
| 05:22.06 | velinp | on nslu2, there are /dev/mtdblock[0-5], redboot in 0; is partitioning the flash a stricture in it, or just a convention (between humans) ? |
| 05:24.35 | ka6sox | I think that redboot has to be there. but the rest is negotiated. |
| 05:25.36 | ka6sox | in the base partition. |
| 05:25.47 | velinp | about bob: i waited for buildd-watcher (cron 0,20,40) to restart the buildd by itself; |
| 05:27.07 | velinp | the strataflash has a base partition (like harddisks?) where the structure is defined? |
| 05:30.19 | ka6sox | best to ask this in #nslu2-linux |
| 05:31.33 | velinp | ok, thanks; nice evening to you :) |
| 05:32.57 | ka6sox | thanks..have a good day. |
| 05:33.35 | velinp | bye; see you later (when I finally have the hdw modified; friend said (maybe) next week :) |
| 05:34.09 | AchiestDragon | :) |
| 05:35.22 | ka6sox | cool |
| 06:12.37 | *** join/#openjtag dot (n=ka6sox@netblock-68-183-62-135.dslextreme.com) |
| 09:38.45 | *** join/#openjtag dwery (n=dwery@nslu2-linux/dwery) |
| 10:52.20 | lennert | [g2]: ok, cool :) |
| 10:53.55 | lennert | velinp: you know that 'velnias' is lithuanian for 'devil'? :) |
| 10:54.05 | lennert | i missed beewoolie again.. darn |
| 11:02.00 | velinp | lennert: oops! I think to rename it immediately :) |
| 11:04.11 | velinp | lennert: debian did tell me to stay with composers, but I didn't listen ... |
| 11:04.26 | lennert | hehe |
| 11:04.29 | lennert | so what is velnas? |
| 11:06.42 | velinp | lennert: it's the name of an armeb buildd I feed, but don't touch; http://unstable.buildd.net/buildd/armeb_Building.html |
| 11:07.04 | lennert | i know |
| 11:07.08 | lennert | but what does the word mean? |
| 11:07.10 | lennert | is it bulgarian? |
| 11:08.20 | velinp | lennert: no; it's just compesed on my name and a NAS; i didn't exepect this name to go outside the house; i also have velrtr,velnbk,vldnbk ... |
| 11:08.41 | lennert | ah, i see |
| 11:08.56 | lennert | like lenbox |
| 11:10.14 | velinp | like lenbox :) had a talk with NAiL on nslu2-linux; he could make good use of jtag-base memtester; know something available (nslu2 or generic)? |
| 11:10.39 | lennert | no, dunno, sorry |
| 11:10.58 | lennert | i would also like to run a jtag memory test over my slug, because it has some memory problems |
| 11:11.13 | lennert | if i can find out which page is broken i can just have that page excluded and use it normally |
| 11:12.46 | velinp | well, I had a slug with bad ram ~10 months ago; i used memtester (by Charles Cazabon); memtester is also in debian/unstable; it's a cute little program |
| 11:13.06 | lennert | okay, but that needs to run from the os, right? |
| 11:14.27 | velinp | yes; i cross-compiled and run under openslug/unslug?? in my case it was a problem that showed randomly and was in high ram, so I could play |
| 11:15.21 | lennert | ok, so, you have it isolated now? |
| 11:16.18 | velinp | better, supplier changed it for my current one; |
| 11:16.32 | lennert | ah, okay |
| 11:16.45 | lennert | mine is heavily modified (serial, jtag) so i doubt i still have warranty |
| 11:17.32 | velinp | so we seem to have a task at hand: spend some effort on a jtag-based memtester ?? |
| 11:17.39 | lennert | yeah |
| 11:17.47 | lennert | get the jtag api and hardware working first, though ;) |
| 11:18.02 | lennert | it's probably possible to make a memory tester with vmaster's stuff |
| 11:20.06 | velinp | i meant if a jtag library is available, it should not be very difficult to modify memtester to test via jtag; speed is a problem; what is vmaster's stuff ? |
| 11:20.21 | lennert | well, you cannot drive SDRAM chips via jtag directly, i think |
| 11:20.27 | lennert | as you have to get the clocking right |
| 11:20.42 | lennert | so, you'll have to program the cpu to load a tiny memory tester into its instruction cache |
| 11:21.00 | lennert | vmaster's stuff is 'openocd', 'open on-chip debugger' (if i understood it correctly) |
| 11:21.20 | lennert | he gave a link about it.. openocd.berlios.de ? |
| 11:21.58 | velinp | it is; thanks; /me reading ... |
| 11:24.13 | lennert | hehe |
| 11:42.50 | vmaster | my stuff is still arm7/9 only, the xscale on the nslu2 is totally different as far as debug is concerned |
| 11:47.32 | velinp | vmaster: hi; lennert just opened my eyes to http://openocd.berlios.de/web/ ; it is still possible to jtag-upload small (~2K) machine code into xscale and execute it there, isn't it ? |
| 11:49.33 | vmaster | that's how xscale debugger work, yeah |
| 11:49.49 | vmaster | http://lapwww.epfl.ch/dev/arm/jelie/index.php |
| 11:49.58 | vmaster | that's the only open xscale debugger i know |
| 11:50.14 | lennert | !linkurl |
| 11:50.23 | vmaster | ? |
| 11:52.14 | velinp | vmaster: thanks; i will need some time to digest that; it's cool :) |
| 11:52.56 | vmaster | gotta take the dogs for a walk... later |
| 12:23.09 | *** part/#openjtag velinp (n=velinp@c88-163.cable.netissat.bg) |
| 12:59.31 | *** join/#openjtag key2 (n=key2@gob75-2-81-56-64-17.fbx.proxad.net) |
| 14:48.22 | *** join/#openjtag velinp (n=velinp@c88-163.cable.netissat.bg) |
| 16:41.43 | *** join/#openjtag bullet (n=bullet@46.60.62.81.cust.bluewin.ch) |
| 17:03.25 | *** join/#openjtag toi (n=pleemans@d5152D12D.access.telenet.be) |
| 17:03.34 | [g2] | any users of flash_erase or flash_eraseall ? |
| 19:27.13 | ka6sox | vmaster, back from dog walking? |
| 19:28.38 | vmaster | heh, yeah |
| 19:31.51 | ka6sox | only 8hrs ago! :) |
| 19:32.30 | ka6sox | how fast does the jtag need to go to do debugging on the ARM7/9 targets you are working on? |
| 19:33.06 | vmaster | writing 128kb of target ram requires 3.5 million tck cycles - the faster the better |
| 19:34.31 | ka6sox | ouch |
| 19:34.33 | vmaster | the at91rm9200 (a arm920t hard core) for example allows up to 50mhz tck rate |
| 19:34.53 | vmaster | the 3.5 million is for the arm7, an arm9 is about 1/3 more |
| 19:35.03 | lennert | the ppc405 in the v2pro can allegedly do jtag up to half of its clock rate |
| 19:35.08 | lennert | so for a 400mhz ppc405 that'd be 200mhz |
| 19:35.08 | ka6sox | what is the fastest rate of tclk that you have seen it a device? |
| 19:35.18 | ka6sox | whoa |
| 19:35.42 | ka6sox | okay maybe we are going to need to re-think the tclk scheme. |
| 19:37.32 | ka6sox | with the rise of faster cores that are able to be clocked faster than the CPLD/FPGA's that I'm used to playing with. |
| 19:38.03 | ka6sox | I don't think that unless we use DDR that we can get those kind of speeds. |
| 19:39.34 | ka6sox | AchiestDragon, is that even possible for us? |
| 19:40.07 | ka6sox | oh wait...thats 200Mb/s |
| 19:40.17 | vmaster | ka6sox: 50mhz would already be very good, i guess |
| 19:40.45 | ka6sox | we are looking at 40mhz but I'm sure that we could ramp it up. |
| 19:46.40 | ka6sox | it sure would be nice to be able to write redboot faster and do some debugging. |
| 19:55.41 | wookey_ | anyone got some gerbers for parallel port wigglers? |
| 19:55.50 | wookey_ | (open ones I can just build?) |
| 19:56.05 | wookey_ | we can't get the chip for the Lart JTAG any more |
| 19:56.55 | AchiestDragon | wookey_: a parallel port jtag |
| 19:58.22 | wookey_ | and much smore software is written for the wiggler pinout |
| 19:58.34 | wookey_ | AchiestDragon: yep |
| 19:58.53 | wookey_ | we made a load of LART/Tux Jtags but have run out. |
| 19:59.17 | wookey_ | I reckon moving to the wiggler design maes sense if we are going to dso something new |
| 20:01.22 | AchiestDragon | whas the chip type that you cant get |
| 20:02.07 | wookey_ | 74AHC541 IIRC |
| 20:03.30 | AchiestDragon | try a diferent supplyer |
| 20:03.44 | AchiestDragon | or manufacturer |
| 20:04.08 | wookey_ | You think those should still be available? I understand we tried quite hard... |
| 20:04.44 | wookey_ | but the point is that we ought to change to a more standard device anyway -having a unique JTAG device doesn't really help anyonhe |
| 20:05.52 | lennert | avnet has them listed |
| 20:05.53 | lennert | but no stock |
| 20:05.58 | AchiestDragon | if not a odd , level translator type then maybe even the 74hc , 74hct type or 74f ,74act should be pin compatable , but gives slighty diferent max speed , at 6mhz paralell port speed should be ok |
| 20:06.00 | lennert | wookey_: check www.em.avnet.com |
| 20:06.45 | vmaster | wookey_: http://mmd.ath.cx/jtag.zip |
| 20:06.57 | vmaster | that file is from the lpc2000 yahoo group |
| 20:07.49 | vmaster | like most wiggler clones, it lacks the nTRST connection - you should add that |
| 20:08.34 | AchiestDragon | http://uk.farnell.com/jsp/endecaSearch/searchPage2.jsp?No=0&OrgTT=*74*541&Nty=1&N=401%2b1005490&=gensearch&Ntt=*74*541&Ntk=gensearch&comSearch=true |
| 20:09.05 | lennert | http://www.semiconductors.philips.com/pip/74AHC541.html ? |
| 20:10.50 | [g2] | wookey_ I'm having a parallel with a Xilinx S3 on board made |
| 20:11.11 | [g2] | I'm gonna get a few and there's a API that's being written up |
| 20:11.21 | [g2] | boards and docu should be ready next week |
| 20:12.22 | wookey_ | [g2]: OK - so that could pretend to be a LART or Wiggler JTAG? caoorindg to xilinx code? |
| 20:12.31 | wookey_ | that could be tres handy |
| 20:13.24 | [g2] | wookey_ I think I'll have its own interface, but we could probably reprogram it |
| 20:13.37 | AchiestDragon | wookey_: its a 8 bit buffer , guess if you reworked the diagram you may be able to use a 74xxx254 setting the dir pin for one direction |
| 20:13.55 | AchiestDragon | 74xxx245 rather |
| 20:15.30 | wookey_ | AchiestDragon: that looks right - I'll tell laurie that his claim you can't get them appears to be bollocks :-) |
| 20:15.52 | wookey_ | As you sey it could be reworked to use a different buffer easily |
| 20:16.12 | wookey_ | but if we are going to rework I'd go for a different pinout. |
| 20:17.14 | AchiestDragon | not used them but there are sites on the internet that stock discontinued components (like 2102 rams that have been out of production for 15 years) |
| 20:19.05 | AchiestDragon | but the 74 range of chips are pritty standard mostly , and with the exeption of some odd ones most are still avalable in one form or another , or there are equivelents in the series that are |
| 20:21.01 | [g2] | wookey_ I'll bug you in there about the flash |
| 20:21.25 | wookey_ | what's the diufferencde between 74AHC and 74HC? |
| 20:21.53 | AchiestDragon | speed genaraly |
| 20:22.33 | AchiestDragon | the hc is cmos , so low power , the a is for advanced |
| 20:23.05 | AchiestDragon | hc highspeed cmos |
| 20:23.51 | ka6sox | the A's are typically more robust. |
| 20:25.08 | [g2] | wookey_ what boot loader are you using with V3 ? |
| 20:31.18 | wookey_ | currently bootldr, although I'd like to change to something else if we can find the time |
| 20:33.59 | ka6sox | lunch...bbs |
| 20:40.04 | [g2] | wookey_ RedBoot is probably too bloated for you |
| 20:40.34 | wookey_ | probably - it's a plausible option though |
| 20:42.06 | [g2] | wookey_ if we get bewoolie on board he could probably do you an APEX |
| 20:42.29 | [g2] | I'm running with RedBoot now |
| 20:42.55 | [g2] | I'm playing around with updating/replacing it from Linux along with the kernel |
| 20:43.13 | wookey_ | the things we need are pxa270 and yaffs support |
| 20:43.13 | [g2] | I can switch between LE and BE systems by just changing the kernel |
| 20:43.36 | [g2] | I haven't played with yaffs |
| 20:43.51 | [g2] | much better than jffs2 ? |
| 20:43.51 | wookey_ | it cool (for NAND) |
| 20:43.57 | [g2] | Ah... |
| 20:43.58 | [g2] | nod |
| 20:44.10 | [g2] | the 512 byte sector thing a different animal |
| 20:44.24 | wookey_ | much faster and simpler than JFFs2 - but no compression |
| 20:44.42 | wookey_ | much easier to include in a bootloader (or other OS) due to simplicity |
| 20:44.42 | [g2] | that's fine NAND is much cheaper than NOR |
| 20:44.59 | wookey_ | designed for NAND (jffs2 was originally designed for NOR) |
| 20:45.13 | [g2] | well I don't think jffs2 is hard |
| 20:45.18 | wookey_ | YSS" now supports 2K NAND as well as 512Byte nand |
| 20:46.00 | wookey_ | [g2]: it's different - you need to reserve more space because you don't know how much space any given bit of data will take up |
| 20:46.10 | wookey_ | (due to compression) |
| 20:46.23 | [g2] | right and it is unhappy when there are no free blocks |
| 20:46.25 | wookey_ | and there is much more code, and it only works with Linux |
| 20:46.34 | wookey_ | that's fine for many people |
| 20:47.02 | [g2] | BSD is so 90s |
| 20:47.07 | wookey_ | yaffs2 works worst with linux :-( |
| 20:47.13 | [g2] | doh! |
| 20:47.54 | [g2] | so can you replace the bootloader from a running system ? |
| 20:48.11 | [g2] | and kernels/rootfs too |
| 20:48.17 | wookey_ | yaffs has been ported to vxworks, wince, eCos, threadx and various in-houes schemes |
| 20:48.22 | [g2] | those should be a lot easier |
| 20:48.57 | wookey_ | [g2]: in principle yes, but in practice the botloder lives in NOR and you only use YAFFS for the NAND |
| 20:49.15 | wookey_ | (because you can't execute bootloader from (most) NAND chips) |
| 20:49.26 | [g2] | ah... so you are probably in the same boat I'm in |
| 20:50.06 | [g2] | wrt replacing the bootloader on NOR from a live system |
| 21:35.43 | *** join/#openjtag ByronT-Away (n=byron-po@nslu2-linux/ByronT) |
| 21:53.58 | *** join/#openjtag [g2-lap] (n=g2@cpe-066-057-008-035.nc.res.rr.com) |
| 21:54.15 | [g2-lap] | AchiestDragon or anyone are you familiar with this ? http://xoscope.sourceforge.net/ |
| 22:11.11 | AchiestDragon | dont like the gui |
| 22:12.43 | [g2] | AchiestDragon are there other tools you'd recommend that could be used as a front-end ? |
| 22:13.42 | AchiestDragon | ? , was looking at the screenshot , just seems to have a lot of popups |
| 22:17.26 | [g2] | AchiestDragon what tools do you think we should use for showing logic and analysis |
| 22:18.23 | AchiestDragon | thay would need writeing |
| 22:24.58 | [g2] | Oh I'm sure there's a bunch of GUI front-ends |
| 22:25.14 | [g2] | we don't need to do everything from scratch |