irclog2html for #openjtag on 20060115

00:00.36lennerti guess that doesn't answer your question.. ?
00:00.46beewoolieWait.  Let me read that again.
00:00.58beewoolieAh, so it does invert.
00:01.03lennertyes
00:01.09beewoolieOK.  That helps some.
00:01.15beewoolieI'll need to edit my schematic.
00:01.21lennertoh
00:01.25lennertyou made this schematic?
00:01.27beewoolieThe problem is that when it floats.
00:01.33beewoolieYeah.  I drew it.
00:01.38beewoolieI didn't design it.
00:01.41lennertoh, okay
00:01.48beewoolieThe notation on the inputs is wrong.
00:01.54beewoolieIt should read TRST and not nTRST.
00:02.26lennertin jtag, does TRST have a pullup like TDI/TMS/TDO do?
00:02.27beewoolieThe other problem is that when the base pulled low and the collector floats, the nTRST output takes a long time to float.
00:02.36beewoolieI think it is supposed to.
00:02.49lennertwell
00:02.52beewoolieWhat I've read is that the standard requires pull-ups.
00:03.16beewoolieBut, the signal is fast to fall from 3.3V.  It takes a long time to rise back again.
00:03.22lennertthe transistor probably floats right away but the trst still has some capacitance
00:03.35lennertthe transistor itself probably has some c-e capacitance as well
00:03.41lennert-- you'd need a pullup
00:04.07lennerti.e. the electrons aren't leaking away very quickly when the transistor floats
00:04.09beewoolieOK.  That's what I thought.
00:04.18beewoolieI'll see about modifying the circuit.
00:04.30beewoolieI want to look at the other lines, too.  it could be that all of them need pull-ups.
00:04.39lennerti think they should be pulled up on the board.. ?
00:04.52beewoolieI thought that nTRST was pulled up, too.
00:04.57lennerti think my s3 board has pullups for tdi/tms/tck on the board...
00:05.00beewoolieOnce I look at the signals, I should be able to tell.
00:05.17lennertwhen i looked at the diagram i assumed that trst would have a pullup too, cause i didn't see one
00:05.29beewoolieWhat diagram/
00:05.29lennertfluke to the rescue :)
00:05.30beewoolie?
00:05.35lennertthe pdf i ftp'ed from you
00:05.44lennerti thought, hey no pullup
00:05.57lennertso i assumed that trst would have a pullup on the board
00:05.59beewoolieI don't understand.
00:06.03lennertokay
00:06.05beewoolieOh, right.  So do I.
00:06.10lennertokay :)
00:06.12beewoolieI'll check.
00:06.28lennerti'm going home on monday and first thing i'll do in .nl is get my fluke :)
00:06.49beewoolieYeah!
00:06.55beewoolieOK.  the clock signal looks really clean.
00:07.05beewoolieI'm going to increase the speed and see how it looks.
00:07.27lennertyou have a scope, too..
00:07.54beewoolieYeah.  I bought it from an auction site.
00:07.59beewoolieIt was about $150.
00:08.03lennertwow
00:08.09beewoolieMaybe $200.
00:08.16beewoolieIt was a reasonable price considering.
00:08.22lennerttaksa should get me one of those
00:08.46beewoolie:-)
00:09.01beewoolieLooks like the interface works fine, even at the highest speed.
00:09.10lennertwhat's the highest speed?
00:09.45lennertwith this transistor, i think trst can toggle at 10mhz or so if you're pushing it :)
00:10.40beewoolieThe parallel port can only do 270KHz.
00:10.59beewoolieShould a 10K pull-up be OK?
00:11.28beewoolie.3ma drain.
00:12.16lennerti think so..
00:13.01lennertthe transistor has about 4 pF output capacitance
00:13.27lennert(according to the datasheet)
00:14.01lennerti.e. 10k will pull it up in 200ns or so
00:17.37beewoolielennert: how do you figure that out
00:17.38beewoolie?
00:18.10beewoolieGiven a charged capacitor, how long will it take to discharge through a known resistance.  Or in this case, charge up.
00:23.36ka6soxRxC
00:25.03lennert4 times the RC time
00:25.16lennert(as a guideline)
00:25.21lennertwhat ka6sox said
00:25.28beewoolieka6sox: Hey.
00:25.45beewoolieit looks like my UBE jtag interface is fine for the task.
00:26.04beewoolieIn fact, it even has nTRST.
00:27.38beewoolielennert: so, RC in this case would be 40ns, 4pf*10KOhms.
00:27.53beewoolieBut, it's really an exponential, right?
00:28.25beewooliee^-kt or some such nonsense.
00:28.27lennertyes, it's exponential
00:28.27lennertyes
00:28.35lennertR * C is the "RC time"
00:28.53lennerti.e the time it needs to go to x % of its value
00:28.58lennert(when discharging)
00:29.11*** join/#openjtag AchiestDragon_ (n=dave@whipy.demon.co.uk)
00:29.29ka6soxbeewoolie, w00t
00:29.33ka6soxglad to hear that
00:29.40lennert(63%, which is 1 - 1/e)
00:29.52lennertsee http://en.wikipedia.org/wiki/RC_circuit
00:29.59ka6soxya..what he said
00:30.04lennertheading "Time domain considerations"
00:30.07beewoolieka6sox: thx.  I built it so long ago... the openwince jtag software doesn't work with it, but I'm not sure why.
00:30.20ka6soxah
00:30.38lennertusually you take 4 or 5 times the RC time to consider it 'done'
00:31.11lennert(at 5 times the RC time, (1/e)^5 = 0.7% of the charge will be left)
00:31.22beewoolieI thought that this board was broken.  I finally got around to looking at it and the only problem I cna see is this nTRST rise time.
00:31.36beewoolielennert: Ah, I see.
00:45.15lennertany math geeks here?
00:50.22beewoolielennert: what's the Q
00:50.45lennerti want to convert a 50mhz clock to a 1.8432mhz clock
00:50.56lennertthat doesn't really divide nicely
00:51.02lennertso
00:51.36lennertwhat you can do is that you generate a clock every 28 cycles for 73 times in a row, and then generate one every 27 cycles for 576-73 times in a row
00:51.43lennertthat will give you exactly 1.8432mhz
00:51.45lennertbut a lot of jitter
00:52.07lennert(50 mhz / 1.8432 mhz = 27 + 73/576)
00:52.29lennertwhat is the optimal way of dividing the 27 and 28 over the 576 slots? :)
00:52.41lennertnot sure how to phrase it more clearly
00:52.44lennertdoes it make any sense?
00:53.02beewoolieLet me think about that for a moment.
00:55.15beewoolieHow accurate do you want it?  Do you want 5 digits?
00:55.39lennertthe optimal way
00:55.50lennert28 28 28 28 28 28 28 27 27 27 27 isn't very optimal
00:56.01lennert27 27 27 28 27 27 27 27 27 27 27 28 27 27 27 is much better already
00:57.33beewoolieAre you planning to do this with some flip-flops?
00:57.38lennertthere are 6169588227439311236793765122563713685468080277641945401304843362102684539482558630358706188800 possible ways according to 'bc'
00:57.42lennertyeah
00:57.49beewoolieSeems cheaper to get the right crystal.
00:57.49lennerti have it using the non-optimal way now
00:57.57lennerthehe
00:58.01lennertit's for the spartan3 board
00:58.10lennerti do have a 1.8432mhz extra crystal on it
00:58.15lennertbut that way my projects aren't 'portable'
00:58.22beewoolieOh.  So the flip-flops are cheap...er...free?
00:58.33lennertthe flipflops come with the spartan3 board ;)
00:58.37beewoolie:-)
00:59.12lennerti _think_ the 'greedy' algorithm is optimal
00:59.18lennertbut i can't prove it :-/
00:59.50lennerti.e. your input clock is 50mhz, 20ns period
00:59.53beewoolieThat's where I'm going.
01:00.09ka6soxthey are "free" essentially
01:00.11lennertyou want the output to have a 542.53ns period (1843200 hz)
01:00.12beewoolieYou accumulate error until you overflow.
01:00.39lennert27 cycles gives you a 540ns period but 28 gives you a 560ns period
01:00.48lennertso, the first cycle it's better to wait 27 cycles
01:00.56lennertcause 542.53 is closer to 540 than 560
01:01.05lennertbut then you have 2.53 error
01:01.11lennertetc.
01:01.15ka6soxit sounds like you need a "real 1.8432MHZ"
01:01.39lennertka6sox: sure, and i have one, but it doesn't come with the sp3 board by default
01:01.54lennertok, i admit, it's a bit of an academical exercise
01:02.04ka6soxheh
01:02.21beewoolieAfter about 8 27's you put in a 28.
01:02.27lennertyeah
01:02.45lennertthe greedy method gives ---+-------+-------+-
01:02.49lennertwhere - is 27 and + is 28
01:03.16beewoolieThat gives 542.22
01:03.24lennert(the distance between +s is sometimes 7, sometimes 8)
01:03.41beewoolie1.8442
01:03.46beewoolie1.8443
01:04.23lennertas long as you do 73 '28's per 576, you won't drift
01:04.26beewoolieYou'd have to alternate between 8 and 9.
01:04.39lennertit's just for the jitter
01:04.47lennerthmmm
01:05.01beewoolieIf that's what you care about, you could just do 73 28's and then the rest as 27's.
01:05.19lennertyeah, but that gives awful jitter
01:06.44beewoolieit's not a simple ration.
01:06.47beewoolieratio.
01:07.11beewoolieIs this audio?
01:07.26lennert1.8432mhz = 16 * 115200
01:07.32lennertit's for serial
01:07.40lennert(where the jitter also doesn't matter much..)
01:07.46lennert(as i said, academic exercise..)
01:07.58lennert(just one of those problems that grab you and won't let go)
01:12.34beewoolieIt's a good one.
01:13.24beewoolieSeems like you can model it with an error calculation, There is an ideal period and there is the current period.  It's a DDA.
01:13.37beewoolieThe trouble is that the target is irrational.
01:14.04beewoolieYou may need 576 data points to get it right.  In fact, you could precalc the steps and just code them directly.
01:16.00lennertwell, in hardware you can do it with a 576 bit array if you do it the ube way
01:16.23lennerti'm sure you can use some tricks to get the logic down
01:16.23beewoolieIt isn't really that bad once you calculate the ideal pattern.
01:16.26lennertyeah
01:16.36lennertso, is the greedy algorithm ideal?
01:16.42beewoolieIt's really a short c program.
01:16.49*** join/#openjtag vmaster_ (i=vmaster@p549B6E39.dip.t-dialin.net)
01:16.52beewoolieI don't know that by name, I suspect yes.
01:17.31vmaster_okay... i got disconnect 5 minutes ago - gotta love 24h disconnect
01:17.32beewoolieYou can calculate the frequency at every step.  When it goes below the target, add a 28.
01:17.40lennerti have a c program that calculates the root mean square of the 'jitter'
01:17.41beewoolie:-)
01:18.00beewoolielennert: I don't think it's that hard.
01:18.05lennertthe rms is remarkably better if you do it the greedy way
01:18.56lennerthttp://www.wantstofly.org/~buytenh/clocks.c
01:23.53vmaster_oh, beewoolie is marc singer?
01:25.36lennertvmaster_: yes..
01:25.51lennertvmaster_: how long did that take you? :-)
01:26.09vmaster_mhh... idling this channel for 3 months
01:26.27vmaster_i just had a look at his jtag schematic
01:26.51lennertpeople should use their real names on irc anyway ;)
01:28.20vmaster_hehehe
01:29.02vmaster_[02:29] [freenode] -!- Nick dominic is already in use
01:29.10vmaster_bad luck, i guess
01:29.31lennerti don't know vmaster_'s real name either.. :)
01:29.46lennertwell, that's what the realname field in /whois is for :)
01:31.47beewoolievmaster_: dood step off!
01:32.33lennert'step off'?
01:32.46beewoolielennert: Sure, you can use the error and optimize the transitions to get closest.
01:33.07beewoolieIt isn't polite to bandy folks' names about on a public channel.
01:33.15beewoolieIt's kinda like passing people's email addresses.
01:33.30lennertah, right.  just wasn't sure what 'step off' means.
01:34.02beewoolieit's still a DDA algorithm.
01:34.22beewoolieI've done it countless times when drawing pixel lines
01:34.45lennertoh, Bresenham?
01:35.00lennerti know that as the bresenham algorithm
01:35.14lennertwonder if wikipedia has a proof..
01:38.46lennertit doesn't
01:49.58beewoolielennert: interesting.  10K doesn't work.
01:50.24lennertas in.. doesn't pull it up fast enough?
01:50.28beewoolieNope.
01:50.28lennerthow long is it taking to pull up?
01:50.46beewooliethe resistor make the curve a little taller and squarer, but not significantly.
01:51.02beewooliePresently, the rise takes about 2ms
01:51.05lennertis this while it's connected to the target?
01:51.10beewoolieYeah.
01:51.13lennertokay
01:51.26lennertmaybe there's a lot of capacitance in the target
01:51.48lennertdoes it go faster when it's disconnected from the target?
01:52.27beewoolieI haven't tried...
01:53.01lennertcan you give that a try?
01:53.07beewoolieYeah.  :-)
01:53.14lennert:)
01:53.17beewoolieWithout a pullup, the output signal isn't nice.
01:53.25beewoolieHang on.  I need to move the ground.
01:54.00beewoolieIt's flat without a pull-up.
01:54.10lennerthow do you mean?
01:54.10beewoolieLet me try with the pull-up, too.
01:54.16beewoolieThere is no output signal.
01:54.19beewoolieIt's 0v
01:54.26lennertokay, hmmm
01:55.55lennertwell, without the target connected there's no vcc :)
01:55.58lennerti think
01:56.03lennertif i'm reading this thing right
01:56.30beewoolieYeah.  Just noticed that.  I have no pullup without the target.
01:56.58beewoolieLet me look at the schematic.
01:57.03beewoolieFor the target...
01:59.02beewoolie10K pullups on the board for TDI, TMS and TCK.
01:59.09beewoolieand tdo.
02:00.00lennert10k should be fine
02:00.36beewoolieWierd.  They've got a 10K pull-down on tck as well.
02:01.04lennertto make it symmetric, probably
02:01.21lennertso the rise time and fall time will be about equal?
02:01.53lennertyou're probably supposed to drive TCK both ways
02:02.05lennert(instead of driving it one way and floating it the other way, as with tdi/tms)
02:02.33lennertyou don't know the pullup value on $RANDOM_BOARD
02:02.38beewoolieSeems like there should only be one.
02:02.48beewoolieRemember, this is on the board itself.
02:02.51beewoolieIt's got both.
02:02.52lennertwhy?  it makes sense to me.
02:02.53lennertyes
02:03.16lennertlet's see what the sp3 board has
02:03.24beewoolieAll it's going to do is create a current drain.
02:03.37lennertand make the clock more symmetric
02:03.44beewoolieOddly, trstn isn't beside the other lines.
02:04.51lennerton the xupv2p tck only has a pull-up
02:05.22beewoolieI admit I'm no pro at this, but I don't see how a pull-up and pull-down will make the signal more square.
02:06.01lennertif you only have a pull-up, the fall time is determined by your drive strength (in mA) and the rise time by the size of the pull-up
02:06.33lennertdrive strength is determined by what's on the jtag adapter, while the pull-up is on the target board
02:07.00lennertinstead of floating it when you want to make TCK rise, you can actively drive it to vcc
02:07.16lennertbut then the rise time and fall time will still be different because you have the pull-up
02:07.26lennertdoes that make any sense?
02:08.16lennertif you use a current source to pull the bus down, the fall will be linear, while the rise will be exponential (due to the pull-up)
02:10.04beewoolieI'll accept it without understanding it.  for now.
02:10.14beewoolieIt looks like the board doesn't have a nTRST signal.
02:10.24beewoolieNo, the *chip* doesn't have nTRST.
02:10.30beewoolieThey wire nTRST to reset.
02:10.33beewooliePOR.
02:11.08lennertokay
02:11.09lennert'POR'?
02:11.37beewooliePower On Reset.
02:11.41lennertright
02:11.49lennerthm
02:11.52beewoolieit's a full reset instead of a warm reset.
02:12.01beewoolieSo, that means that there could be a lot of things using that line.
02:12.06lennertyeah
02:12.14beewoolieI think that I have to accept that the JTAG schematic is really OK.
02:12.27beewoolieI just need to let the reset be slow.
02:12.28lennert2ms sounds like it has not 4pF but 40nF capacitance.. well, that's still not unrealistic
02:12.43beewoolieThat's what I thought.
02:13.03beewoolieLet's see if the data sheet has a value for it.
02:13.21lennerti wonder why they don't use a simple buffer for TRST
02:13.35lennertbut a transistor instead
02:13.45lennertprobably because they expect the transistor to be off most of the time, hm
02:15.18beewoolielennert: do you mean on my schematic?
02:15.25lennertbeewoolie: yes
02:15.32beewoolieI think because it inverts.
02:15.40beewoolieAnd, there are no more lines.
02:15.44lennertyou can get inverting buffers too
02:15.52beewoolieThe 244 has only four outputs.
02:15.59lennertright
02:16.07beewoolieAnother chip?  or a transistor?
02:16.10lennertbut an inverting buffer isn't much bigger than a transistor..
02:16.16lennertanother chip
02:16.20beewoolieLots more pins.
02:16.23lennertone that can swing trst up as well as down
02:16.27beewoolieRemember that I made this by hand.
02:16.32beewoolieI agree.
02:16.40beewoolieI don't recall where I got the schematic.
02:16.46lennertif you can drive trst both ways you won't have this problem
02:16.46beewoolieI must credit it somewhere.
02:16.55lennertright, you said it wasn't yours
02:16.55beewoolieI'm not sure it is a problem.
02:17.05lennertwell, no, it's only the reset line
02:17.07beewoolieI'll have to see how it performs on the slug.
02:17.19beewoolieAlso, the design makes it possible to ignore the voltage of the target.
02:17.22beewooliefor ntrst.
02:17.48beewoolieThe xlinx design is good this way too, but it has *no* reset capability.
02:18.51beewoolieep1220 uses a transistor ...let me check.
02:20.29beewoolieHe uses a FET for the RESET pin and a 245 (buffer) for nTRST
02:20.38lennertright
02:22.17beewoolieHe's got four outputs and four inputs plus a reset.
02:22.45beewoolieNo, that's wrong.
02:23.10beewoolieHe's got four outputs. two inputs, and two selectable as either.
02:23.16beewooliePlus reset.
02:23.34beewoolieDarn, I wish I had that last resistor.
02:24.02lennerthow do you mean?
02:25.35lennerthttp://www.standardics.philips.com/products/lvc/pdf/74lvch322245a.pdf is the datasheet for a 32bit bidi buffer.. the test circuit on page 11 has both a pullup and pulldown on the output, too
02:29.47[g2]hey lennert !
02:29.55lennert[g2]!
02:30.12lennerthow's you?
02:30.36*** join/#openjtag toi (n=pleemans@d5152D12D.access.telenet.be)
02:32.48[g2]Great lennert thx
02:34.11lennertwhat's funny, over here they always say 'normal' instead of 'good' or 'great'
02:34.18lennert"i'm normal"
02:34.53lennertwell, neither can i :)
02:35.00lennertthey just mean that things are as usual
02:35.08[g2]that's _why_ we IRC so much :)
02:35.19[g2]I fully comprehend
02:35.31lennertto me, 'good' sounds like 'normal'.  but they think that 'good' is for when you win the lottery or something.
02:35.43lennertsubtle difference in language that i keep forgetting and making mistakes with
02:35.49[g2]life is all relative :)
02:36.13lennertyup :)
02:36.45[g2]I haven't seen scarface but I heard a line from there "Any day above ground is a good day"
02:37.02lennerthehe
02:37.16lennertmy profession is more boring than that
02:38.08[g2]beewoolie what was the sticking boint on the JTAG ?
02:56.28beewoolie[g2]: I don't really know what was wrong.  I think that the openwince jtag software has some sort of problem.
02:56.54beewoolie[g2]: I've got jtag code that works fine with it.
02:56.59beewoolieSearch me.
02:57.13beewoolieI'll be finishing my code so that I don't have to worry about openwince.
02:57.14[g2]Ok your code works but openwince doesn't
02:57.20beewoolieright.
02:57.35beewoolieI can read the target ID as well as some of the coprocessor registers.
02:57.39beewoolieI'm confident that the HW is fine.
02:57.46[g2]awesome
02:57.56beewoolieSo, it's just a matter of hacking at JTAG to get the rest of the functionality.
02:58.09beewoolieIt's only been...a year since I built the thing.  :-)
02:58.20[g2]are you going to move on to flashing or debugging fiirst ?
03:00.40beewoolieI'm not sure.
03:00.47beewoolieI need to get access to the processor register.
03:00.56beewoolieOnce I do that, it should be easy to do flashing
03:01.07beewoolieDebug is going to take more work, but the basics should be easy.
03:01.23beewoolie[g2]: I'm working on it.  ;-)
03:01.28[g2]heh
03:09.35lennertok, 4am, bed time for me
03:09.37lennertnice chatting
03:09.39lennertg'nite all
03:09.43[g2]sweet dreams
03:09.44beewoolienitey nite
03:09.49beewooliethanks
03:09.50[g2]heading home tomorrow ?
03:22.03*** join/#openjtag _AchiestDragon (n=dave@whipy.demon.co.uk)
03:42.47wookey__bee-dinner: there is a very similar jtag device schematic here:
03:43.00wookey__http://www.lart.tudelft.nl/projects/jtag/
03:43.23wookey__essentially equivalent to the wiggler device but just wired up a differently due to different buffer chip
03:45.47wookey__sadly we use one of each for cpld and cpu jtag ports on B2 ('cos that's what the software is set up for and it was easier to get two dongles than fix the software :-/
03:46.17wookey__funny - that pdf comes up on a blakc background for me with gpdf. It didn't used to.
03:46.55wookey__bee-dinner: Do you really find it impolite to use real names on IRC? I didn't realise this convention existed.
03:47.15wookey__I'm with lennert  - much easier if people use real names so you can work out who's who.
03:47.49wookey__<PROTECTED>
03:47.58wookey__anyway - late here - night.
03:48.56wookey__(I mention the lart JTAG dongle just as something to compare with as there seems to be a lot of chat above about the one you have maybe not working? - I've only skimmed though - ignore me if it's all sorted)
03:51.06[g2]hi wookey__
03:53.04[g2]wookey__ how close is the B3 hw ?
04:09.04wookey__layout is done, boards are being made now
04:09.23wookey__prototype production run is soon (jan/Feb - not exactly sure)
04:09.59[g2]do you know how much the boards will cost ?
04:10.10wookey__nope, not yet
04:10.44[g2]I'm looking for a guessitimate range in $100 increments
04:10.49wookey__I do know there will be a respin as soon as we show that it basically works, as a couple of things got missed off v1 in order to 'get it out'.
04:11.08wookey__we were aiming for GBP 100, but have no doubt missed.
04:11.28wookey__should be in the GBP 100-200 range, so $150-300
04:11.57wookey__Also depends if you have CPLD or FPGA, how much ram, flash etc fitted
04:12.24[g2]the design is open right ?
04:12.30wookey__yes
04:12.36[g2]I've got 2 ideas in mind
04:12.47wookey__I think the exact licence is still to be decreed, but should be like B2
04:13.17[g2]that's something like if you make big changes you need to send them back thingy
04:13.24wookey__(which let you build your own, but not produce lots of small variation on the board
04:13.51wookey__(otherwise there is no reduction of costs by sharing larger runs)
04:14.47wookey__if you want to make changes - design an expansion board, was the idea
04:14.56wookey__what are you ideas?
04:15.21[g2]1) send you money and have extra board tacked on to the initial run to send out to devs
04:15.21wookey__(I really ought to go to bed - it's 4:15 am here and I have woodchopping to do tomorrow morning)
04:15.41wookey__OK - that should be no problem
04:15.56[g2]2) have the design reviewed and commented on by a professional design house
04:16.13wookey__We have been using itechnic.co.uk for that
04:16.50wookey__Dave Bisset there is ex-dyson (vacuum cleaners) and thus familiar with production engineering/cost reduction etc
04:16.53[g2]ok. Well thx for your time. sleep well and get great rest for the woodchopping
04:17.03[g2]I'll be around tomorrow and the next day etc....
04:17.15wookey__But if you have someone else who wants to get involved that would be worth talking about
04:17.31wookey__night
04:17.31[g2]well I've got a hardware vendor building my boards
04:17.41[g2]cheers sweet dreams
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06:50.33ka6soxLennert: ping?
06:57.33key2g2-lap: still there ?
06:57.57[g2]key2 yes
06:58.41key2g2: in the digilent spec, they say 2 PPC but I wonder if it's possible to run a linux with multi proc
06:58.55ka6soxyes it is.
07:00.17key2and then let's say I wanna add a PCI device (or cardbus), what do I have to do ? compile the driver for the chip and map the PPC's PCI base address ? or is it more complicated than that ?
07:00.39key2let's say hostap for a wifi card
07:00.45ka6soxget a chip that supports the timing requirements of PCI
07:00.59ka6sox(something that has a PCI interface already)
07:02.11key2g2: with your blackdog, can't you use the MMC connector to transform it into a JTAG programmer ?
07:03.11[g2]key2 that was my whole point
07:03.46[g2]with a little FPGA magic and possibly off connector hw (cpld or components) it'd be a plug in
07:03.53key2yeah but you have to be capable of recompiling a linux on it plus remake all the cores it needs for the USB and sheet like that
07:04.03key2wonder if the PHY is inside the fpga or a chip outside
07:04.18[g2]key2 no it runs Sarge on the PPC core
07:04.43key2oh so you won't touch that ?
07:04.54[g2]you'd just change the section that remaps the MMC connector
07:05.05key2yeah but do you have the source ?
07:05.15[g2]I think it's open
07:05.33key2you haven't already tryed to fedle with it ?
07:05.52[g2]I haven't looked deeply into it, but you can put serial on the thing
07:06.00[g2]for the PPC core
07:06.13key2where do you stick the max232 ?
07:06.27[g2]the TX/RX pins :)
07:06.32[g2]and VCC/GND
07:06.39[g2]they're labeled
07:06.47key2oh so you have to open the shit
07:07.09[g2]well that'd be for development
07:07.19key2gotcha
07:07.33[g2]but I think this may be OBE
07:07.42key2fuck it's 8 AM and i haven't slept yet
07:07.43key2.-
07:07.43[g2]Overtaken By Events
07:08.00key2gni?
07:08.19[g2]dunno gni
07:08.45key2you have an URL
07:08.45key2?
07:09.03[g2]URL for blackdog ?
07:09.07key2yeah
07:09.08key2dev
07:10.13[g2-lap]http://www.projectblackdog.com/
07:11.49[g2]key2 are you a fpga programmer ?
07:11.57key2verilog
07:11.59key2not fpga
07:11.59key2.-
07:12.01key2:)
07:12.19[g2]verilog
07:12.24[g2]versus vhdl
07:12.42key2not vhdl
07:12.43key2fuck
07:12.48key2i'm so tired .-
07:12.50key2:)
07:12.59key2that's what I meant
07:13.23key2by the way
07:13.42[g2]you are a vhdl programmer ?
07:13.58key2what's the best between cadence or mentor graphic for designing pcb ?
07:14.11key2no, i programm in verilog, and not in vhdl
07:15.01[g2]and do layout right ? :)
07:15.09key2:)
07:15.21key2i use orcad
07:15.33key2but heard mentor graphic was good for that kind of thing
07:15.57ka6soxI've used PCB and it works pretty well.
07:16.03[g2]I'm sure it is but last I heard it was quite expensive
07:16.15ka6soxorcad is.
07:16.16[g2]kinda like abatron for JTAG or BDI
07:16.23key2even P2P ? :)
07:16.29ka6soxPCB is free and does up to 8 layers.
07:17.24key2yeah but not sure it has the same features
07:18.58ka6soxits pretty good including using netlists.
07:19.13ka6soxeagle PCB is good too.
07:19.28key2yeah for home use :)
07:20.00ka6sox[g2] what are you wanting to use it for?
07:20.33[g2]ka6sox the blackdog ?
07:20.34key2the blackdog is great but I don't know a single thing usefull that runs on it
07:21.04ka6soxits a training tool..not a "real" linux system.
07:21.15[g2]oh I couldn't resist a hardcore running debian on a at least semi-open platform
07:21.17[g2]for $199
07:21.48[g2]I've only waited like 3-4 years to get a softcore/hardcore on a fgpa
07:22.43[g2]its really a real linux system ~400 MHz PPC 64MB memory USB 2.0 it's more powerful than a slug
07:22.43key2g2: what do you do in life ?
07:23.07[g2]I've got an embedded linux hw/sw company
07:23.26key2url ?
07:23.39[g2]http://www.giantshoulderinc.com
07:23.46[g2]http://www.giantshoulderinc.com/hw-4533
07:23.53[g2]http://www.giantshoulderinc.com/ab3/case.jpg
07:24.12[g2]There will be a web update real soon
07:27.13key2g2: who developed the hardware ?
07:28.47[g2]A California company
07:29.02key2why not yourself ?
07:29.36[g2]because you weren't around to give me a layout :)
07:29.45key2:)
07:29.54[g2]time-to-market, cost, risk
07:30.05key2riskS
07:30.15[g2]costS
07:30.31[g2]I've been in the industry for nearly 25 years
07:30.37key2really ?
07:30.41[g2]I'm pretty familiar with stuff
07:30.46key2how many people works in your company ?
07:30.51[g2]me
07:31.02key2on your own ?
07:31.12[g2]and the misses does some bookwork
07:31.19[g2]yup all on my own
07:31.37[g2]and a bunch of ppl on the internet helping me informally
07:31.42key2why someone would buy this thing and not just a simple PC ?
07:31.56[g2]<5W power
07:31.59[g2]POE
07:32.13[g2]14-15K Debian apps
07:32.27[g2]Appliance builds
07:32.30key2people don't really care aboput that
07:32.35key2about
07:32.43[g2]ok then it'll fail
07:33.07[g2]doesn't really matter that much
07:33.59[g2]the point is I've got a full-on embedded linux company shipping hw and embedded linux distros
07:34.17[g2]I can easily consult to more than pay for all the hw
07:34.26key2yeah
07:34.40[g2]It's not the "goal" per se
07:34.51[g2]it's who you become trying to reach the goal
07:35.55[g2]so now I've got many of the skills I've wanted to work on and the proof is in the product
07:35.57key2plagiarism.com ??
07:36.01key2:)
07:37.12[g2]it's late I'm missing the poirt
07:37.18[g2]s/poirt/point
07:37.24[g2]s/poirt/point/
07:37.46[g2]it's an open source company
07:37.55key2no
07:38.13key2talkin about that:  it's who you become trying to reach the goal
07:38.28key2anyway
07:38.40[g2]yes, i heard it on a tony robbins tape
07:38.42key2at this time of the night/morning i can only talk shit
07:38.50key2it's 8:45 and am DEAD :)
07:38.57[g2]sweet dreams
07:39.03key2u
07:39.05key22
07:39.07[g2]soon
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07:44.06velinpka6sox: ping
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08:40.30ka6soxyo
08:42.04ka6soxvelinp, pong
09:28.24velinpka6sox: I sent a summary (including ka6sox) of our discussion to nslu2-linux, (#10838) for comments;
09:33.23velinpmaybe it's late night for you and I was too slow; sorry
10:01.29velinphey, just noticed: openjtag turns 1 yr today! happy anniversary and openjtagg'ing to all!
12:07.19lennertka6sox: pong
12:08.11lennertvelinp: thanks :)
12:38.12velinplennert: hi, still kicking the poor arm platform of yesterday:)? know whenabouts wouter comes back ?
12:49.21lennertvelinp: i took a slight break from kicking that platform :)
12:49.27lennertno idea when wouter will be back
12:49.34lennerti saw him post to debian-devel today though
12:51.41velinplennert: thanks; will try to find him; you a DD now?
12:54.00lennerti don't even have an AM assigned yet!
12:54.09lennerti don't expect to be a DD until 2007/2008, if at all
13:00.48velinplennert: but you will be; good to hear that; I saw wouter's post; hope he comes back to my slug by his own will :); time for me to do some work.
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15:41.41[g2]morning lennert
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16:50.10lennertmorning [g2]
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20:26.58key2morning g2
20:27.17key2g2: what do you think about the gumstix
20:42.31[g2]key2 the gumstix is nice depends on what you want to use it for
20:45.20[g2]to me the gumstix is more of an embeddable product and an appliance
21:38.36key2i see
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23:44.00[g2]hi jamie
23:47.36jamiehello g2
23:48.12[g2]welcome to openjtag
23:48.38jamiethanks.  I've been here before, but never gotten much involved.

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