irclog2html for #openjtag on 20060105

00:00.35beewoolieIt lowers costs.  After all, these bit-serial interfaces are an improvement, too.
00:28.01[g2]anythoughs on bittorrent versus emule ?
00:28.31lennertemule is a stupid name?
00:28.54ka6sox-officeI think so.
00:30.28prpplaguebeewoolie: hey
00:30.33prpplaguebeewoolie: whats cookin?
00:30.50beewoolieme 2 me 2 me 2 me 2  yipee!!
00:31.01lennertbeewoolie: ?
00:31.21beewoolieI started with the Internet late in life.  I'm just catching up.
00:31.23ka6sox-officebeewoolie is cooking?
00:31.33lennertoh
00:31.36lennertthe aol-phase
00:31.44beewoolieprpplague: hey man.  Been working on some JTAG stuff.
00:32.02beewoolieBTW, I asked Jun about the wiggler code you sent.  He claims ignorance.
00:32.06lennert'aol phase', actually.  (i keep connecting noun parts..)
00:32.42beewoolieprpplague: I'll have a 2232 working in a week or so.
00:33.17prpplaguebeewoolie: yea i got your email just been swampped with a big high dollar legacy project
00:33.25prpplaguebeewoolie: should be free'd up mid of next week
00:48.35lennertI.430 specifies that for ISDN S/T cables.. "..the difference in the resistance of conductors of a pair shall not exceed 6% or 60Mohms, whichever is greater."
00:48.48lennert60 Mohms, eh..
01:12.09*** join/#openjtag vmaster_ (i=vmaster@p549B6905.dip.t-dialin.net)
01:29.03lennert[g2]: you know stuff about BRI ISDN, what is the Activation bit used for?  it's described in the frame format but i don't see it referenced anywhere in I.430.
01:29.38[g2]lennert I know a little about T1/E1 but not really ISDN
01:29.43lennertokay
01:29.56[g2]is BRI 2D + 1B ?
01:30.00lennertyup
01:30.21[g2]I think the 2D are just like the channelized T1/E1
01:30.24lennert192kHz bit rate, 4000 frames of 48 bits per second
01:30.42lennert(actually, it's D + 2B)
01:30.49lennert32 of those 48 are the B channels
01:30.51[g2]right
01:30.53lennert4 are D
01:31.15[g2]it's been a while
01:31.34[g2]2B + 4D ?
01:31.41lennertthen there are some low bandwidth channels between the TE and NT for enabling selftest, loopback
01:31.44lennertno, 2B + 1D
01:31.50lennertbut 4 bits out of the 48 are for D
01:31.55lennertand 32 out of 48 are for B
01:32.13lennertthat makes the D data rate 16000 bits/sec
01:32.18lennertand the B data rate 2x64000 bits/sec
01:32.25[g2]nod
01:32.32[g2]that sounds familiar
01:32.37lennertthe rest is framing and balance
01:32.41lennertbut there is one "Activation bit"
01:32.47lennertwhich doesn't seem to be documented anywhere else
01:32.54[g2]and the signalling on the 16000 bit channel is the tricky part
01:33.02lennertthat's LAPD
01:33.09lennertrelated to LAPB and HDLC
01:33.16lennertall Q.xxx stuff
01:33.21lennerti finally have those Q.xxx standards in .pdf now
01:33.32[g2]does the Activation bit just toggle high and low ?
01:33.33lennertinstead of antiquated microsoft word 2.0 format (which no modern program can read anymore)
01:33.42lennerti don't know, it doesn't say
01:34.33lennertok, so, thanks
01:34.35[g2]I forget or never really knew how the clocking was done with ISDN
01:34.40lennertwell
01:34.44lennertthe NT clocks the BRI off the network
01:34.54lennertthere is the 'U' interface between the NT and the ISDN network
01:35.05lennertthe BRI (the S/T interface) is clocked off the U interface
01:35.23lennertand the ISDN equipment synchronises to that 192kHz clock and synchronise the transmissions back to the NT to that clock
01:35.50lennert(with 2 bits delay)
01:36.02[g2]my Q is how the NT derives the clock from the signal
01:36.13[g2]what's the clock recovery mechanism
01:36.21lennertwhich signal?  the signal from the network or the signal from the terminal equipment?
01:37.07[g2]often the network is the master and the CPE just recovers clock from there right ?
01:37.10lennertyeha
01:37.16[g2]the Xmit is slaved to the RX
01:37.18lennerti assume with a PLL of some sort
01:37.23[g2]then they jitter together
01:37.30[g2]and there aren't any frame slips
01:37.34lennertthe S/T uses inverse AMI to ensure enough transitions
01:37.47lennertnot sure what U uses
01:37.54lennertprobably something like that too
01:38.20[g2]I thought in E1 the Channel 0 or 16 whichever had something in it to derive the clock
01:38.29lennertyeah
01:38.34[g2]T1 can get it from the framing
01:38.40lennertcould be
01:38.54[g2]I'm pretty sure that's how it's recovered with T1
01:39.37[g2]So there's either some bits in the D channel or in the wrapper of the 2B + D envelope
01:39.47[g2]s/bits/bit(s)
01:40.37lennerti can't find where the U interface is defined
01:40.54lennertwell, S/T uses AMI
01:40.56lennertwhich is ternary
01:41.04lennerti.e. there is not just on/off but -1, 0 and 1
01:41.17lennerta sequence of 11111 is sent on the line as 0000000
01:41.25lennertbut a sequence of 00000 is sent as -1 +1 -1 +1 -1
01:41.38lennert010101010101 is sent as -1 0 +1 0 -1 0 +1 0 etc
01:41.53[g2]I thnk that's how the recover the frame and clock
01:41.58lennertyeah
01:42.08lennertto find the start of the 48-bit frame, look for a code violation
01:42.15[g2]and the -1 and +1 are used to not build up cap. on the line
01:42.20lennertso instead of -1 +1 -1  there will be -1 +1 +1 or something
01:42.33lennertyes, to keep it DC-free
01:43.04[g2]and the bit-stuffing in HDLC had to do with the repeater lenght
01:43.09[g2]at least for T1 iirc
01:43.24[g2]cause 45 years go the electronics were a little different
01:43.27lennertnot sure about HDLC yet
01:43.30lennert:)
01:43.36lennertstuff changes..
01:43.48[g2]the bit-stuffing prevents more than 5 1's iirc
01:44.10[g2]it inserts an extra bit with a 0
01:44.11lennertoooh
01:44.15[g2]maybe it's 6 1
01:44.17[g2]1s
01:44.17lennerti see what you mean
01:44.32lennertB8ZS?
01:44.39lennerthttp://en.wikipedia.org/wiki/B8ZS
01:44.44[g2]no HDLC
01:44.48lennertoh
01:45.01lennertHDLC is carried
01:45.01[g2]B8ZS is clear channel
01:45.08lennertHDLC is carried inside the D-channel, no?
01:45.20[g2]yes it's bit oriented
01:45.32lennertyou don't need to prevent more than X 1s at that level because the lower layers do the proper escaping, right?
01:45.54[g2]well it's transparent
01:46.07lennertyeah
01:46.08[g2]you don't know if you're running over fiber or a T1
01:46.16lennertoh
01:46.28lennertso this crap is actually done on two different layers for T1?
01:46.33[g2]so yes it's transparent to the upper layers
01:47.04lennertdamn, i can't find the U specs
01:47.04[g2]it's just an interface
01:47.35[g2]with B8ZS you just glob together N 64K channels
01:47.43[g2]like 1,3,5,7 and 9
01:47.52[g2]that'd be 5x64K
01:48.07lennertB8ZS is replacing 00000000 by 000V10V1 iirc
01:48.26[g2]that's sounds right too
01:48.35lennert(V = violation code)
01:48.40[g2]you couldn't have too many 0s on the line either :)
01:48.45lennertof course ;)
01:48.57lennertactually, you can't have any bits on the line or it'll break!
01:49.34[g2]I thought they'd just fall out of the middle :)
01:49.47lennertindeed, they could
01:49.55dwery-awayhey.. I left you all with JTAG and now.. whate are all those ISDN acronyms? :-D
01:50.09lennertdwery-away: sorry :)
01:50.13lennertdwery-away: switched subjects :)
01:50.14dwery-awayit remembers me the good old days when I was a XyXEL betatester :-D
01:50.21lennertZyXEL ?
01:50.21dwery-awayZyXEL
01:50.24lennertyeah
01:50.29lennerti have an adsl modem of theirs
01:50.41prpplaguei had one of their isdn modems
01:50.43dwery-awayi'm plenty of old ISDN routers and TAs...
01:50.57dwery-awaythe TAs where fine.. you can't find a TA like theirs nowadays
01:51.09lennertah
01:51.15lennertthe U interface uses 2B1Q
01:51.20dwery-awaythey were small ISDN PBX
01:51.59lennertU = ANSI T1.601
01:53.25lennert80 ksymbols/sec at 4 levels (2 bits per symbol)
01:54.22lennertit's not like AMI.. so i assume the clock can be derived from the framing
01:54.48[g2]QPSK ?
01:54.59lennertno, not phase shift encoding
01:55.04lennertthey don't use a carrier
01:55.15[g2]FSK
01:55.30lennertjust -2.5V for 00, -0.83V for 01, 0.83V for 11 and +2.5V for 10
01:55.36[g2]ASK
01:55.41[g2]AM
01:55.43lennert[x] none of the above
01:55.48[g2]AM
01:56.09lennertnot AM either
01:56.13[g2]VM
01:56.15[g2]:)
01:56.32lennertwhat's that? :)
01:56.48[g2]Voltage Modulation :) I just made it up
01:57.05lennerthehe
01:57.09[g2]I don't think it's really called that
01:57.19lennertwell, it's kind of like Amplitude Shift Keying, except that it doesn't use modulation
01:57.28[g2]right
01:57.37[g2]there's no carrier
01:57.38lennertyou can say it's ASK with DC +2.5V as the 'carrier' wave :)
01:57.47lennertDC instead of a sine
01:57.50lennert[g2]: indeed
01:58.21lennertso, as i said.. you get all the ITU specs, and the U ISDN spec is not part of the series cause it's an ANSI spec
01:58.23[g2]and how do they recover the clock ?
01:58.32lennert[g2]: i don't have the spec..
01:58.44lennert[g2]: not from the data bits, i assume
01:58.51lennert[g2]: so from the framing somehow
01:59.07lennert[g2]: there's 12kbps (out of 160kbps) used for framing
01:59.14[g2]nod. there's most likely a framing wapper
01:59.29[g2]bps or sps
01:59.56lennertbps/sps ?
02:00.05[g2]cause that's 6k symbols or 80k symbols
02:00.37lennertthe start of each frame probably has some clear pattern
02:01.13[g2]nod, but I'm just saying the framiing and data are running at half the rate
02:01.21[g2]due to the physical encoding
02:01.23lennertyeah, they do
02:01.26lennert2 bits per symbol
02:01.54[g2]so 12kps is really 6k symbols per second.... that's all I was saying
02:02.07lennertyeah, okay, got it
02:02.17[g2]you get twice at long to process the symbol
02:02.30[g2]I didn't know what the real data rate was
02:02.51lennert'real' data, 64+64+16
02:03.06[g2]nod
02:03.10lennert12 for framing and 4 for loop management
02:03.38lennert=160
02:04.05lennertstill didn't figure out what the activation bit is :)
02:04.25[g2]sorry I don't know
02:04.34lennertno i mena, i'm looking through the docs
02:04.43[g2]nod
02:05.51[g2]lennert did you test you UART or just simulate it to find out the rate it would support ?
02:06.00[g2]s/your UART
02:09.39lennerti tested it on the s3 board and it seemed to work okay
02:09.47lennerti only tested it up to 115k2 though
02:10.06lennertbut the timing report said it should work up to 50MHz-ish
02:10.13[g2]right, but I thought you said that it could run to like 1M
02:10.17[g2]in theory
02:10.22lennert(that's oversampled clock rate)
02:10.46lennertok, let me synthesize it to see what it says, i'm kind of vague on the actual rate
02:11.30lennerti didn't test 1M
02:11.47lennertnot yet :)
02:11.58lennertdon't have a suitable receiver
02:12.05lennertmaybe i could test it in loopback
02:12.08[g2]lennert you don't have to... I was wondering whether you had tested it or just synth'd it
02:12.49lennertextensively tested, on the s3 board, only up to 115.200
02:12.56lennert<PROTECTED>
02:12.58lennerthum
02:13.11[g2]I meant at the 1M rate
02:13.33[g2]ka6sox-office had mentioned something about how fast the OC could run
02:13.44[g2]open-collector
02:13.46lennertOC?
02:13.57lennertoh
02:13.59lennerthow do you mean?
02:14.44[g2]that's what I'm trying to understand.  He mentioned there might be a rate limiting factor and I didn't really grasp why
02:14.56lennertwell
02:15.08lennerthe probably means that if you use OC, your output can't switch too fast?
02:15.30lennertOC = external pull-up resistor, and the output buffer shorts the output to ground or floats it
02:15.47lennertif you float it, it takes a while for the output to go back high
02:15.59[g2]RC tie
02:16.01[g2]RC time
02:16.08lennertdepends on how stiff you pull-up is or how much current you sink into it
02:16.21lennertkind of, yes, since your transmission line is kind of a C
02:16.40lennertwith a regular resistor it'll go exponentially back to 1
02:16.43lennertwith a current source linearly
02:16.51lennertcheck the SMBus specs, it has a good explanation about this
02:16.57lennertthe SMBus is open collector too
02:17.00lennertand they have the same issues
02:17.12[g2]thx for the reference
02:17.17lennerta regular RS232 connection is not OC though (since there's only one master)
02:17.23[g2]is JTAG driven OC ?
02:17.24lennertso i wonder if this is what he meant
02:17.28lennertJTAG is OC, yes
02:17.33lennertexternal pullups
02:17.39lennertso, same issu
02:17.40lennerte
02:18.07lennerthttp://www.smbus.org/specs/smbus20.pdf
02:18.24*** join/#openjtag ka6sox (n=ka6sox@nslu2-linux/ka6sox)
02:18.35[g2]now that's great timing :)
02:18.38lennertsee page 10
02:18.52lennertpage 15 for the smbus model
02:18.59lennert(Cbus and Rp)
02:19.11lennerthi ka6sox
02:19.25ka6soxhiya
02:19.30ka6soxwhazzup?
02:19.52lennerttalking about OC :)
02:20.19ka6soxcool...I'm here
02:20.20[g2]lennert's sch00l1ng me
02:20.45lennerti just explained OC and how rise/fall time is affected by the stiffness of your pullups
02:21.04ka6soxthe problems with OC and FPGA/CPLD's are well known :)
02:21.11lennertand pointed [g2] to the smbus spec (http://www.smbus.org/specs/smbus20.pdf) which has purty diagrams
02:21.12ka6soxexactly.
02:21.23ka6soxgood plan.
02:21.50lennertp10 and p15 mostly
02:21.56[g2]is I2C OC too ?
02:21.58ka6soxsome have a step function in them where they go to 3.3v quickly and then sorta creep up to the OC pullup voltage.
02:22.01lennert[g2]: yeah
02:22.28ka6soxits definately OC.
02:22.32lennertka6sox: you get linear voltage rise with a current source and exponential with a resistor..
02:22.49lennertka6sox: so you can do the linear thing to get there quicker..
02:23.04ka6soxya..but its still a step function.
02:23.22lennerthow do you mean, step function?
02:23.51[g2]_|---
02:24.37lennertthe voltage rise isn't a step function, is it?
02:25.11ka6soxyes it is...it rises quickly to Vio and then slowly up to Vpullup
02:25.50lennertif you let it float?  doesn't it go exponential all the way if you have a pullup resistor?
02:26.06lennertwhat exact configuration are you thinking of? :)
02:26.13lennertmaybe we're thinking of different circuits
02:26.55ka6soxthe OC with a pullup
02:27.57beewoolieka6sox: Is the Memec ijc-2 cable supported by wince jtag?
02:30.10lennertka6sox: OC is an RC circuit, is it not?
02:30.59lennerthttp://en.wikipedia.org/wiki/RC_circuit
02:31.06lennerti'm thinking of those diagrams
02:31.19lennert{capacitor,resistor} voltage step-response
02:45.47lennertyeah, time for sleep, 5 AM here
02:45.49lennertg'nite all!
02:46.54[g2]nite
02:47.13ka6sox[g2] how is the download coming?
02:47.22[g2]so far so good
02:47.30[g2]8%
02:47.37ka6soxah
02:47.38ka6sox:)
02:47.43[g2]started about an hour ago
02:48.17ka6soxah cool.
02:48.25[g2]I dl'd and SCP a few iso's without error
02:48.44[g2]Knoppix and a couple Ubuntu's
02:49.21[g2]Knoppix was pulled around 500KB/s and the ubuntus were local at 1.8MB
02:49.45[g2]http woud probbly be faster
02:49.58[g2]I'll have to try that tomorrow
02:50.04ka6soxyou are wgetting it?
02:50.56[g2]yeah
02:51.21[g2]I was saying that locally I did a SCP for the ubunutu xfers
02:51.28ka6soxah
02:51.38ka6soxokay I"m going out to a meeting for a bit...bbiaw.
02:51.47[g2]cheers and thx
02:51.55ka6soxnp...cya!
03:09.51beewoolie[g2]: holy mackerel.  Cable broadband?
03:10.54[g2]beewoolie ???
03:11.05beewoolie[g2]: Hey
03:12.05[g2]beewoolie the cable broadband runs at 11MBs to 60MBs :)
03:12.12beewooliesheesh
03:12.23[g2]100Mbs and 1000Mbs
03:45.44beewoolie[g2]: dollface says hi
03:46.10[g2]hey dollface
03:46.58[g2]beewoolie do you know Vincent Sander's nick ?
03:49.30*** join/#openjtag [g2-lap] (n=g2@cpe-066-057-008-035.nc.res.rr.com)
03:50.12beewoolie[g2-lap]: Who's that?
03:51.43[g2-lap]http://linuxdevices.com/news/NS2222705755.html
03:51.59[g2-lap]http://www.simtec.co.uk/products/EB675001DIP/
03:52.45[g2]32MB ram, 4MB flash, CPLD and room to grow a little
03:53.00[g2]sounds about perfect for a little JTAG device no ?
03:53.40[g2]"custom cost-effective in lots about 25"...
03:55.16beewoolieDepends on how fast it can run.
03:55.25beewoolieThat is, how fast it can signal the jtag port.
03:56.02beewoolieThe only thing that the USB device won't be able to do is reach the 20MHz scanningfrequency.
03:57.03[g2]the ARM runs at 60Mhz
03:57.16beewoolieSo it might get there.
03:57.30[g2]well, it depends on how it's wired to the CPLD
03:57.40[g2]I'm guessing at least 8 or 16 bits wide
03:57.43[g2]maybe 32
03:58.15[g2]I'd guess the CPLD is hung off a chip select
03:58.34beewoolieindeed.
03:58.42beewoolieI'm going to work on getting something working first.
03:59.06beewoolieThey use a closed source boot loader.
03:59.37[g2]yeah so ppl don't have to JTAG
03:59.55[g2]but it does have a JTAG header
04:00.12[g2]so we could self-reprogram it
04:00.25[g2]well not the _same_ unit obviously :)
04:00.51beewoolieIt has a jtag header.
04:00.59beewoolieOh, you saw that....
04:01.09[g2]40 lines tothe Xilinx
04:01.16beewoolieReally, the 32KB ram version would be interesting for the JTAG dongle.
04:01.28beewoolieEspecially if we can get it really cheap.
04:01.40[g2]they are $175 Q1
04:01.48[g2]and $50 in "Quantity"
04:01.49beewoolieNo xilinx on the cheapo model.
04:01.54beewoolieHmm.
04:01.58[g2]Xilinx CPLD
04:02.13beewoolieNot on the cheapest one, tho.
04:02.30[g2]I'm sure they could do a custom unit
04:02.47beewoolieOh, sure.
04:02.53[g2]in Q25
04:03.21beewoolieI read that.  Is that the same sort of range where the loft boards were customizable by the vendor?
04:03.30[g2]heh it support WOL
04:03.41beewoolieWake on lan?   Nice.
04:04.01[g2]WOL your personal JTAG butler :)
04:11.59[g2]that article was from a couple months ago
04:25.03[g2]ah...
04:34.51beewooliebbiab
04:35.33*** join/#openjtag beewoolie-afk (n=beewooli@206.124.142.26)
06:05.45dollfacehi [g2]
06:05.53dollfacebeewoolie is making dinner for me
06:06.51dollfaceand beewoolie is having adventures with ka6sox's JTAG dongle
06:07.10dollfacedon't you wish you were here?
06:09.23[g2]heh
06:10.29dollfacegoodnight [g2]
06:10.44[g2]g'nite dollface
06:11.03[g2]say g'nite to bee for me
06:11.12dollfacewill do
06:11.14dollfacebzzz
06:11.16[g2]thx
08:44.01lennert[g2]: Vince is "kyllikki"
09:59.14*** join/#openjtag dyoung-away (n=dyoung@nslu2-linux/dyoung)
10:10.41vmasterohhh, that simtek board looks nice
11:33.52*** join/#openjtag bullet (n=bullet@230.59.76.83.cust.bluewin.ch)
13:13.01prpplagueanyone know a good channel to discuss libusb apps?
13:13.11lennertdunno, sorry
13:13.53prpplaguethanks
13:20.30vmasteroh, if you find one, let me know
13:46.40dyoung-awayvmaster: If you can find peteru on #openslug or #nslu2-linux, he knows quite a bit about libusb stuff
13:51.00*** join/#openjtag prpplague (n=billybob@72.22.152.142)
14:18.36[g2]lennert morning :)
14:19.05[g2]lennert are you familiar with those boards from Simtec ?
14:20.00[g2]The OKI 675001 Module ?
14:20.16lennertnot familiar with them, no
14:20.39[g2]it's a 60Mhz arm with a CPLD on board
14:20.51lennertno idea
14:21.34[g2]well I think we could setup the CPLD to do Bit shifting and drive it from the ARM 32bits at a time
14:21.37[g2]there's DMA too
14:21.52[g2]and ethernet
14:22.02lennertwhat does it cost?
14:22.15[g2]$175 Q1 < $50 in quantity
14:22.37[g2]they'll even do custom orders for as little as Q25
14:22.47lennertkind of the same price as the platform usb cable but without the software ;)
14:24.17[g2]I'd guess around the same price.  
14:25.30[g2]there's 42 IO pins to the CPLD
14:25.49[g2]from the processor
14:26.32lennertthat's quite a bunch
14:26.40vmasterbut only 72 macrocells
14:26.57vmasterthat could be a bit tight
14:27.44[g2]vmaster good point, I'll bet that not the largest CPLD in the family, but I dunno
14:28.50lennertlarger ones cost more though..
14:29.34[g2]yeah like fpga where an extra $40 gets you 600K on the S3
14:30.25vmastermhh, guess the package options are more of a restriction than the few extra $ for a larger cpld
14:30.44[g2]it's a XL9572XL
14:31.02[g2]I'm checking where that is in family
14:31.04lennertan xc3s200 goes for $24 and an xc3s1000 goes for $47 at avnet
14:31.38lennertthe xc3s1000-ft256 goes for $51, so it's not all that much more expensive
14:31.52[g2]ok $23 800K gates, nod
14:33.27vmaster9572 is the second smallest
14:34.19[g2]same footprint ?
14:34.28vmasterdepends on the package they use
14:34.50vmasterhttp://www.xilinx.com/products/95xlsh.pdf
14:35.04vmasterthere's a matrix of packages and device sizes
14:36.24[g2]thx my google-fu was lacking on the XL9572XL search
14:37.25vmastermhh, but i guess an atmel sam7 would still be a better choice if we're going for a uC w/ ethernet solution
14:37.54vmasterthe built-in serial controller makes life a lot easier
14:39.04[g2]vmaster  I just looking at this because it seemed cheap, in the right area, and built, and customizable in Q25
14:40.09[g2]I heard an interesting quote abou Goal setting.. It's not the goal, its the person you become trying to reach the goal
14:41.22[g2]it is wonderful to have some varied ideas and have ppl interesting in trying to achieve this
14:48.40[g2]hey it looks like simtec sells mini-pci based arm boards too
14:50.31prpplague[g2]: yea simtec makes some good stuff
14:50.58prpplague[g2]: their staff can be quirky to work with though if you need tech support
14:51.05prpplague[g2]: atleast imho
15:24.20[g2]do you guys know how to have the partition table reloaded ?
15:58.36lennert[g2]: with an ioctl
15:58.59lennert[g2]: or start fdisk and 'w' your partition table (be sure that it doesn't replace a mac disklabel with a dos disklabel for example!)
16:01.33[g2]lennert thx, I think mount -o remount / does it too :0
16:01.35[g2]:)
16:01.58lennertoh, does it?  odd..
16:02.24lennertooook
16:02.32lennert/sbin/blockdev --rereadpt /dev/hda
16:02.40lennertthat ought to work
16:02.51prpplagueanyone got experience doing usb from the slave end of things?
16:03.49[g2]lennert _that_ looks really handy thx
16:34.12sgmillerprpplaque, what are you looking for?
16:36.35prpplaguesgmiller: just doing alot of usb dev at the momment, between a sa-1110 device and a host pc
16:36.52prpplaguesgmiller: mainly using libusb and a kernel driver on the slave
16:38.17sgmillerthat do you want to "know about the slave end of things" I've made a couple of devices.
16:38.27sgmillerthat -> what
16:53.35[g2]sgmiller hey!
16:53.43sgmillerhey!
16:53.49[g2]meet the gang
16:54.01sgmillerhello gang, nice to meet you.
16:54.04[g2]heh
16:54.58[g2]lennert and dwery-zzzz are ARM kernel hackers and lennert's into _everything_..  He's got a V2pro board he's playing with
16:55.13[g2]prpplague and ka6sox-office build some boards and hw
16:55.23prpplaguesgmiller: running linux on the slave?
16:55.30sgmillervery good... my kind of folks.
16:55.37[g2]vmaster and ep1220 do a bit of JTAG
16:55.48sgmillergood.
16:55.50[g2]dyoung-away is an all around guy
16:56.18lennerthello sgmiller
16:56.20sgmilleranyone done anything interesting with the PPC on the V2pro?
16:56.22sgmillerhello.
16:56.28prpplaguenot i
16:56.34lennertme, not yet..
16:56.45lennertstill have some coreconnect docs to wade through :)  have you?
16:56.47[g2]I've got a Black Dog
16:57.03[g2]that's got a hardcore running Debian
16:57.06sgmillernope...
16:57.47lennerti've been meaning for a few days to hack on the v2p board.. but i'm a bit distracted by arm kernel stuff atm
16:58.22sgmillerblack dog???  is that the thing with the biometric reader?
16:59.24[g2]yeah
16:59.52[g2]it's quite slick for the money
18:36.51*** join/#openjtag prpplague (n=billybob@72.22.152.142)
18:44.42*** join/#openjtag prpplague (n=billybob@72.22.152.142)
18:46.06*** join/#openjtag beewoolie-afk (n=beewooli@206.124.142.26)
18:46.14prpplaguebeewoolie-afk: hey hey
18:46.44beewoolie-afkyo
18:46.46beewoolie-afkprpplague: finally got the MMC socket and break-away header.
18:48.55beewoolie-afk~seen ka6sox-office
18:49.09purlka6sox-office is currently on #openjtag (1d 22h 16m 2s).  Has said a total of 30 messages.  Is idling for 18h 17m 46s
18:49.09qbotka6sox-office is currently on #openjtag (1d 22h 16m 24s).  Has said a total of 30 messages.  Is idling for 18h 17m 46s
18:49.25beewoolie-afkprpplague: have any experience with the insight ijc-2 JTAG widget?
18:49.41ka6sox-officeI'm sorta here.
18:49.57beewoolie-afkka6sox-office: coo
18:50.04ka6sox-officeI used the Wince stuff with that unit about 8 months ago.
18:50.12ka6sox-officeand the Xilinx stuff too.
18:50.17beewoolie-afkka6sox-office: What 'cable' is it?
18:50.25ka6sox-officeXilinx III
18:50.38beewoolie-afkXilinx supports it, I know, but I haven't found it in wince by grepping.
18:50.47beewoolie-afkExcellent...
18:50.56ka6sox-officeits a type III cable.
18:51.04beewoolie-afkIt's kinda clever.  It supports three output voltages.
18:52.23prpplaguebeewoolie-afk: cool
18:52.37prpplaguebeewoolie-afk: no, no experience with that ijc-2 jtag widget
18:52.40prpplaguebeewoolie-afk: url?
18:52.50ka6sox-officeya .
18:52.52beewoolie-afkprpplague: Can't find one.
18:53.03beewoolie-afkka6sox-office: It's a Xilinx DLC5 JTAG Parallel Cable III?
18:53.39ka6sox-officebeewoolie-afk, Yes I think thats right.
19:08.26lennertwell
19:08.33lennertjtag only has to pull down to ground, right?
19:08.38lennertso in theory, it would support any 'voltage'
19:08.44lennertunless i'm mistaken
19:09.17beewoolie-afklennert: I think the issue is that driving 5V into a 1.3V device could be destructive.
19:09.43beewoolie-afkAnd I think I am wrong about the three voltage levels.  At least, the schematic doesn't show it that way.
19:10.24beewoolie-afkI was simply measuring the output voltages as I exercised the parallel port.
19:11.12lennertadd zeners ;)
19:11.49beewoolie-afkYou're...a...zeners
19:16.19lennertwell really, a jtag dongle doesn't need to drive any voltage into anything
19:16.27lennertTCK, TDI, TMS are high by default
19:16.34lennertyou want them zero, you pull 'em down
19:16.37lennertyou want them one, you float 'em
19:20.44beewoolie-afkAccording to the ARM TRM.even though the IEEE spec 'effectively requires TDI and TMS to have internal pullup resistors', they don't do it.
19:21.14beewoolie-afk...in order to minimize current draw.
19:26.08*** join/#openjtag Tiersten (n=tman@nslu2-linux/Tiersten)
19:26.10*** join/#openjtag tman_2 (n=tman@ideal.trejan.com)
19:26.12*** join/#openjtag Tiersten_ (n=tman@nslu2-linux/Tiersten)
19:26.55beewoolie-afkTiersten: howdy
19:27.40lennertso
19:27.40lennertyou're supposed to drive them both ways?
19:27.40beewoolie-afkThat's what the TRM says.
19:27.41beewoolie-afkI'm reading the 922 docs.
19:27.41lennertso if you let them float.. they float
19:27.41lennerthmm
19:27.49lennertwell, won't the board have external pullups then?
19:27.54lennertotherwise it's kind of useless
19:28.09beewoolie-afkI would expect that TCK is not floated, but then it all depends on the board design.
19:28.15lennerti mean, if you leave TCK unconnected it might just pick up spurious cycles
19:28.17lennertyeah
19:28.17TierstenHey beewoolie
19:29.34beewoolie-afklennert: The LPD schematic for the lh7a404 has pullups.
19:30.00lennerti think it's reasonable to have external pullups instead of internal ones
19:30.30lennertbut if they have real stiff ones that'll put a nasty limit on the maximum speed
19:30.49beewoolie-afkThat's dirty.
19:30.52lennertyou can just put an extra pullup in your jtag dongle and activate it only when jtag is in use ;)
19:31.06lennertso it'll draw the extra current only when you're using jtag
19:31.38beewoolie-afkThe LPD board has 10K pullups on those lines.
19:31.54lennerti have no idea what typical values for bus capacitance are
19:32.01vmasterthe arm multi-ice drives both low and high
19:32.59lennertwell, you could actually drive it high instead of floating it if you want it to go faster.. i don't think that'd cause any problems
19:33.10lennertoh.. that's probably what ka6sox meant the other day
19:33.35beewoolie-afkAs long as you have the right output voltage.  QED
19:34.12lennertindeed
19:34.45lennertyou deserve an internet
19:34.55beewoolie-afkHeck, I've already got two.
19:35.01lennerthehe
19:42.06vmasteruhm, doesn't the parallel cable iii use the target supplied vcc?
19:42.25beewoolie-afkIn english please.
19:42.26lennertyeah
19:42.40lennertthere is a vcc pin on the jtag connector
19:43.06beewoolie-afkOn the xilinx cable, the VCC from the target is used to detect if the target is present.
20:54.40*** join/#openjtag prpplague (n=billybob@72.22.152.142)
23:07.30lennertanyone here studied the ppc405 in the virtex2 pro?
23:07.44ka6sox-officeonly briefly in a class.
23:07.54lennertoh
23:07.56lennertyou had your course?
23:07.59lennerthow was that?
23:09.08ka6sox-officeit was okay..they mostly spent time on uBlaze.
23:09.23lennertokay
23:09.29lennertwas it useful to you?
23:09.33ka6sox-officeyes it was.
23:09.35ka6sox-officeand still is!
23:09.38lennertokay
23:09.43lennertdid you use your xupv2p board yet?
23:09.45ka6sox-officethey explained the EDK very well.
23:10.06ka6sox-officeit just arrived *after* the course.
23:10.15lennertoh, great
23:10.20lennertdidn't play with it yet?
23:10.22ka6sox-officebut we had one in class to play with.
23:10.35lennertokay
23:10.36ka6sox-officenot yet...I'm going to play with it starting next week or so.
23:10.42ka6sox-officeI've been moving.
23:11.01lennertyeah i know
23:11.35ka6sox-officenow that I"m out of that period I intend to continue working on the S3/V2 stuff.
23:12.06lennertokay
23:45.43lennertka6sox-office: so i can send you my xupv2p projects and you can run them!
23:46.21*** join/#openjtag ulf_k (n=ulf_kypk@p54BDBA5E.dip0.t-ipconnect.de)
23:52.56ka6sox-officeyes!
23:59.27lennertgreat!

Generated by irclog2html.pl by Jeff Waugh - find it at freshmeat.net! Modified by Tim Riker to work with blootbot logs, split per channel, etc.