| 03:53.08 | lennert | no, i'm using the parallel jtag cable |
| 03:55.22 | lennert | http://www.wantstofly.org/~buytenh/mvi_4945.avi |
| 03:55.40 | lennert | that's pong :) |
| 03:56.44 | lennert | i think we're using 60hz or so |
| 03:57.08 | [g2] | I wonder how fast you can drive it |
| 03:57.25 | [g2] | and how full the FPGA is in routing and utilization ? |
| 03:57.27 | lennert | the 50mhz oscillator is a bit of a pain |
| 03:57.34 | *** join/#openjtag dyoung-web (n=80ab9a96@nslu2-linux/dyoung) |
| 03:57.48 | lennert | dunno but i doubt this uses significant resourecs |
| 03:58.07 | lennert | dyoung-web: http://www.wantstofly.org/~buytenh/mvi_4945.avi |
| 03:58.31 | lennert | just a bunch of up counters and down counters and some flipflops |
| 03:59.35 | dyoung-web | Thanks, spanking your link now. |
| 04:03.06 | dyoung-web | thats pretty darn cool |
| 04:03.18 | lennert | yeah |
| 04:03.21 | lennert | Ron is the man |
| 04:03.28 | dyoung-web | what did you make the 7-segment display say? |
| 04:03.44 | lennert | i just made the ball bounce back and forth, he implemented the game logic |
| 04:04.06 | lennert | dyoung-web: nothing, i should have tied those lines high but i didn't so they say 8888 |
| 04:04.23 | dyoung-web | thats really neat. I feel motivated to learn VHDL now |
| 04:04.29 | lennert | dyoung-web: you just gave Ron the idea to make the 7seg display display the score for each side |
| 04:04.37 | dyoung-web | heh |
| 04:04.42 | lennert | but it's 6am so i guess we'll do that tomorrow :) |
| 04:05.17 | dyoung-web | In this video I cant tell if it says something cool, like scrolling pong-pong-pong or something;l but the score is a great idea ! |
| 04:06.15 | dyoung-web | did you have to do something ugly to get the clock(ing) right for the VGA bits ? |
| 04:06.18 | lennert | yeah |
| 04:06.32 | lennert | or every time the ball hits one of the paddles (?), you can make the display flash PONG |
| 04:06.53 | lennert | and (ab)use the serial port as pulse width modulator to a speaker |
| 04:07.00 | lennert | so you can make a pong sound |
| 04:07.13 | lennert | dyoung-web: naah, the clocking was easy |
| 04:07.40 | lennert | coool.. the 'ball speed' counter wrapped to zero so now the ball is bouncing vertically :) |
| 04:07.57 | lennert | clearly more thought has to go into the design |
| 04:08.03 | lennert | this is kind of UbE :) |
| 04:08.05 | dyoung-web | I have this old LCD module that I was thinking about plugging the S3 into for fun tsuff like this. |
| 04:08.16 | dyoung-web | but i keep getting distracted. |
| 04:09.07 | lennert | you have to lock yourself up in a room with just that board |
| 04:09.58 | lennert | i had the same problem, i had it laying around for months untouched |
| 04:10.19 | dyoung-web | Me too., I've had it since last september. |
| 04:10.30 | dyoung-web | holy crap thats a whole year ! |
| 04:11.00 | lennert | you could have written so many fpga arcade games in that year! |
| 04:11.23 | lennert | i wonder how hard a c64 emulator would be |
| 04:12.47 | dyoung-web | Someone has one of those posted someplace. |
| 04:13.06 | dyoung-web | lennert, we registered s3projects.org a while ago for fun stuff such as this. |
| 04:14.27 | lennert | cool |
| 04:25.07 | *** join/#openjtag dyoung-web (n=80ab9a96@nslu2-linux/dyoung) |
| 04:25.18 | lennert | dyoung-web: i'll have some stuff to add to s3projects.org soon, i think |
| 04:25.35 | dyoung-web | Cool, I wonder what happened to it.... |
| 04:25.47 | dyoung-web | seems to have gone awol for now |
| 04:29.14 | lennert | i'm off to bed -- g'nite all |
| 04:35.56 | [g2] | nite |
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| 10:07.28 | ka6sox | we need a "leg" up |
| 10:09.16 | ka6sox | when I get back...got it "covered" |
| 10:09.26 | lennert | i wonder what it is that the previous one was infringing on |
| 10:09.35 | lennert | we can always do a ppc or sparc or something if they keep being jerks |
| 10:12.08 | dyoung | Did you see that gaisler sparc core ? |
| 10:12.32 | dyoung | ESA is using it. |
| 10:13.55 | lennert | yeah |
| 10:13.56 | lennert | the Leon |
| 10:14.04 | lennert | the Leon eval boards cost megabucks |
| 10:14.10 | lennert | kilobucks, rather |
| 10:14.19 | dyoung | Hmm |
| 10:14.25 | lennert | yeah, but the fun is to write a core yourself |
| 10:14.36 | dyoung | Yeah. |
| 10:14.58 | dyoung | I need a good excuse to buy that V4 dev board |
| 10:15.14 | lennert | me too :-/ |
| 10:15.30 | lennert | my other half is ok with it but it's like $80 shipping to here |
| 10:15.44 | dyoung | The M L401 ? |
| 10:15.48 | dyoung | $80 ?! |
| 10:15.56 | *** join/#openjtag vmaster_ (i=vmaster@p549B67DA.dip.t-dialin.net) |
| 10:16.36 | lennert | no, the other one |
| 10:16.42 | lennert | the digilent v2pro board |
| 10:17.04 | lennert | http://www.digilentinc.com/info/XUPV2P.cfm |
| 10:17.07 | dyoung | Oh... |
| 10:17.17 | dyoung | I was looking at http://www.xilinx.com/xlnx/xebiz/designResources/ip_product_details.jsp?sGlobalNavPick=null&sSecondaryNavPick=null&category=&iLanguageID=1&key=HW-V4-ML401-USA |
| 10:20.45 | dyoung | this board is pretty neat. |
| 10:21.02 | lennert | yeah |
| 10:21.04 | dyoung | theres so many ports on it I dont know what I would do. |
| 10:21.05 | lennert | it's $500 though |
| 10:21.10 | lennert | and the digilent one is $300 |
| 10:21.31 | lennert | and the digilent one has a dimm slot and sata so i like it more |
| 10:21.34 | dyoung | I dont know what the salient differences between the v4 and v2pro are. |
| 10:21.39 | lennert | what does the ml401 have that the digilent does not? |
| 10:22.24 | dyoung | Pretty much nothing, except its a V4 |
| 10:22.46 | dyoung | Platform Flash thingo too |
| 10:23.05 | dyoung | I th ink I mean SystemACE |
| 10:23.19 | dyoung | I'm not up with the terminlogy |
| 10:25.37 | dyoung | I guess V4 is lower power 90nm and "multi platform" whatever that means. |
| 10:25.49 | lennert | does the v4 have powerpc cores too? |
| 10:26.41 | dyoung | Either one or 2 of them. |
| 10:27.24 | dyoung | For the FX. DUnno about the LX/SX yet |
| 10:27.35 | lennert | hmm |
| 10:27.46 | dyoung | Yep, only the FX has the PPC. |
| 10:28.05 | lennert | for a project here at the university It Would Be Nice to be able to do genetic algorithms in an fpga |
| 10:28.28 | dyoung | so the ML401 would not have the PPC hard core. |
| 10:28.45 | dyoung | Lennert, there was an actricle about that in the last Xcell magazine. |
| 10:28.59 | dyoung | "genetic sequencing using a FPGA Coproessor" |
| 10:29.04 | lennert | fluffy just points me to this |
| 10:29.04 | lennert | http://www.enterpoint.co.uk/moelbryn/broaddown2.html |
| 10:29.11 | lennert | dyoung: genetic sequencing is totally different, no? |
| 10:29.19 | lennert | i know that people used the ixp2000 for genetic sequencing |
| 10:31.16 | dyoung | Fluffy ? |
| 10:31.30 | lennert | oh, sorry |
| 10:31.32 | lennert | Ben |
| 10:31.35 | lennert | Ben Dooks is his name |
| 10:31.37 | lennert | another arm kernel hacker |
| 10:31.50 | dyoung | Okay, I had to Re-read what you just said. |
| 10:32.00 | dyoung | Genetic Algorithm. |
| 10:32.37 | lennert | my friend (which was over at my place last night) does genetic algorithms |
| 10:32.51 | dyoung | Anyhow, yes the digilent $300 board seems like a better value. |
| 10:32.56 | lennert | and they want to buy a cluster for evaluating them quickly |
| 10:33.09 | lennert | but i figure that it can be done much faster with a bunch of fpgas |
| 10:33.31 | dyoung | Yes, in the same issue of Xcell there was something similar. |
| 10:33.41 | dyoung | (assuming I understand what a genetic algorithm is) |
| 10:34.16 | lennert | well, something that has a pool of candidate solutions, a fitness evaluation function for a candidate solution, and a way of creating new candidate solutions from existing ones |
| 10:34.20 | dyoung | taking things like chromosomes and determining all the possible outcomes; using a bigass tree. |
| 10:34.23 | lennert | using mutation, crossover, whatever |
| 10:34.44 | dyoung | Okay close enough. |
| 10:34.53 | dyoung | Let me grab that magazine |
| 10:35.06 | vmaster | dyoung: you talked about genetic sequencing, isn't that something completely different? |
| 10:35.38 | dyoung | Yes. Thats another animal |
| 10:36.51 | vmaster | genetic algorithms is like: i know the inputs, i know how to evaluate who is better, let evolution figure out how to get me where i want |
| 10:36.59 | lennert | yup |
| 10:38.33 | lennert | http://www.enterpoint.co.uk/moelbryn/minican.html |
| 10:38.39 | lennert | E145 for a pci board! |
| 10:38.51 | dyoung | http://www.nallatech.com/?node_id=1.2.2&id=2 |
| 10:41.03 | dyoung | then you slap some of these on |
| 10:41.04 | dyoung | http://www.nallatech.com/?node_id=1.2.2&id=11 |
| 10:41.51 | lennert | dyoung: aren't those way expensive? :) |
| 10:42.06 | dyoung | probably |
| 10:42.24 | lennert | i'll just fill out the form, see what they say |
| 10:43.50 | lennert | i'd really like the uni to start using fpgas for this stuff |
| 10:43.54 | dyoung | okay I get it |
| 10:44.17 | dyoung | So you feed your GA some basic information and a set of parameters. |
| 10:44.47 | dyoung | Let it sit there and run through all possibilities then you have the best answer for the specificied specification |
| 10:45.19 | dyoung | sort of like what chess game would do |
| 10:45.41 | lennert | s/all/a subset of all possible/ |
| 10:48.12 | dyoung | Cool. |
| 10:48.45 | dyoung | a FPGA should be good at that. |
| 10:49.07 | lennert | evaluating lots of stuff in parallel, yes |
| 10:49.20 | lennert | you can just make a very simple core (say, an arm core) and put 32 of them in one fpga |
| 10:52.25 | lennert | you can even make it do async memory references :P |
| 10:55.07 | lennert | it has to be something that has gcc support |
| 10:55.21 | lennert | otherwise people won't grok it |
| 10:55.40 | vmaster | is it possible to get arm licenses for such "small" projects? |
| 10:55.41 | lennert | and it shouldn't be x86 because i won't grok the resulting vhdl anymore after a week :P |
| 10:56.02 | lennert | vmaster: a friend tells me that arm are just really being twats and can't really stop you |
| 10:56.12 | lennert | vmaster: you're not infringing on anything unless you implement thumb, apparently |
| 10:56.36 | vmaster | ah, ok, so you use an arm isa, but not an actual core? |
| 10:57.40 | lennert | well, that would be the plan |
| 10:58.09 | lennert | arm happens to be what i'm familiar with |
| 10:58.30 | lennert | but if arm keep being twats i can do mips or sparc instead |
| 11:13.33 | dyoung | reading this digilent product page for the v2p board jogged my memory. |
| 11:14.08 | dyoung | at some point I need to write/make a doo dad that takes a video input and is able to sample a arbitrary line of data from the signal and store it. |
| 11:14.39 | dyoung | That sounds like something the V2P can do. |
| 11:14.45 | dyoung | right? :-) |
| 11:18.48 | lennert | yeah, i think so |
| 11:18.55 | lennert | the v2p board plus the analog input module :) |
| 11:19.36 | dyoung | Yep. |
| 11:19.43 | lennert | so you'll have your toys paid for you |
| 11:19.45 | dyoung | Okay, *now* I have a an excuse to buy one. |
| 11:19.47 | lennert | damn ;) |
| 11:20.03 | lennert | dual powerpc cores, you can run linux on it too! |
| 11:20.10 | dyoung | Yep! |
| 11:20.26 | dyoung | Theres a appnote for Microblaze/uClinux too |
| 11:20.27 | lennert | *cough* bastard *cough* :) |
| 11:20.34 | dyoung | Yep. |
| 11:20.36 | dyoung | :-) |
| 11:20.41 | lennert | microblaze is evil proprietary $$$-ware, isn't it? |
| 11:20.47 | dyoung | Probably. |
| 11:20.58 | lennert | we need to write the OpenJTAGCpu |
| 11:21.06 | dyoung | LennertBlaze is going to be way cooler. |
| 11:21.09 | lennert | hah |
| 11:21.20 | lennert | MicroDerek doesn't have that ring to it, i agree |
| 11:21.27 | dyoung | Hey... |
| 11:22.15 | lennert | i'd write an ARM core and call it the PhukTart |
| 11:22.25 | lennert | and then wait until arm send their nastygrams my way |
| 11:23.02 | lennert | (and then file a complaint about them sending me obscene letters) |
| 11:26.07 | dyoung | hehe |
| 13:17.43 | lennert | g'nite |
| 13:17.45 | *** part/#openjtag lennert (n=buytenh@nslu2-linux/lennert) |
| 13:18.09 | *** join/#openjtag lennert (n=buytenh@nslu2-linux/lennert) |
| 13:18.20 | dyoung-zzzz | nitey. |
| 13:18.36 | dyoung-zzzz | Nice Email btw. :-) |
| 13:18.46 | lennert | hehe, why so? |
| 13:19.16 | dyoung-zzzz | "Your web form is brainless, but anyways..." :-) |
| 13:19.24 | lennert | hehe, yes :) |
| 13:21.15 | lennert | i mean, you give a list of 20 fields, * marks the fields that are mandatory, and all fields have a * ! |
| 13:21.42 | dyoung-zzzz | Yep. |
| 13:22.03 | dyoung-zzzz | Probably written by some part-timer or consluttant. |
| 13:22.10 | lennert | consluttant :) |
| 13:23.07 | dyoung-zzzz | hehe one of my friends has been trying to talk me into making a move to san francisco to do consluttant work. |
| 13:23.31 | dyoung-zzzz | she keeps saying, "you dont need to be a total slut, just someone's bitch for a while. its not that bad!" |
| 13:23.58 | lennert | haha |
| 13:32.36 | lennert | dyoung-zzzz: and she enjoys being someone's bitch for a while? |
| 13:33.01 | dyoung-zzzz | I think she has a normal job. |
| 13:33.07 | dyoung-zzzz | bitch. :-) |
| 13:34.00 | lennert | does her husband agree? |
| 13:34.38 | dyoung-zzzz | not married. |
| 13:35.02 | dyoung-zzzz | but hmm. |
| 13:35.17 | lennert | still sounds slightly wrong :) |
| 13:36.09 | dyoung-zzzz | I offered to be her bitch, but that wasnt appealing enough. |
| 13:36.14 | lennert | hehe |
| 13:36.21 | lennert | other way round of course! |
| 15:21.38 | lennert | dyoung-zzzz: i received a response from nallatech, they want to know my location |
| 15:29.49 | vmaster | no word about prices? |
| 15:30.42 | vmaster | ah, in case you didn't see the usenet posting - the enterpoint devices will be on discount |
| 15:32.10 | lennert | vmaster: oh.. |
| 15:32.16 | lennert | vmaster: when, where, whom? |
| 15:32.40 | vmaster | Prevue - FPGA Dev Board Sale |
| 15:32.40 | vmaster | From: |
| 15:32.40 | vmaster | John Adair <removethisthenleavejea@replacewithcompanyname.co.uk> |
| 15:32.40 | vmaster | Date: |
| 15:32.40 | vmaster | Friday 30 September 2005 16:46:29 |
| 15:32.42 | vmaster | Groups: |
| 15:32.45 | vmaster | comp.arch.fpga |
| 15:32.47 | vmaster | no references |
| 15:33.34 | vmaster | GBP£160 (BD2-400) and GBP£190 (BD2-1000) |
| 15:33.42 | vmaster | due to a "stock clearance" |
| 15:34.24 | lennert | i found the post |
| 15:35.27 | lennert | so that'd make the bd2-1000 board E272,- |
| 15:35.40 | lennert | and the -400 E229,- |
| 15:36.16 | *** join/#openjtag [g2] (n=g2@nslu2-linux/g2) |
| 15:36.28 | vmaster | about 30% off |
| 15:36.39 | lennert | yeah |
| 15:37.06 | [g2] | 30% off ??? |
| 15:37.14 | [g2] | morning guys |
| 15:37.19 | lennert | yeah |
| 15:37.37 | lennert | the enterpoint pci boards are on sale, apparently |
| 15:37.50 | [g2] | url ? |
| 15:37.58 | [g2] | new rev coming ? |
| 15:38.25 | lennert | he also writes: |
| 15:38.26 | lennert | We also have a product coming that is aimed at students and is going to be |
| 15:38.26 | lennert | aimed at the cheap end of the market. It will be PCI based and should be |
| 15:38.27 | lennert | capable of supporting some of Broaddown2's DIL header add-ons. |
| 15:38.32 | lennert | so that is extra good news |
| 15:50.08 | [g2] | I wonder if enterpoint needs a US distributor :) |
| 15:57.23 | [g2] | lennert how's the vhdl coding going ? |
| 15:58.15 | [g2] | A USB 1.1/2.0 analyzer would be way cool too |
| 15:59.54 | vmaster | would a fpga be fast enough for that task? |
| 16:30.44 | [g2] | 1.1 way easy |
| 16:31.00 | [g2] | 2.0 a reach |
| 16:32.19 | vmaster | yeah, that's what i think |
| 16:32.25 | vmaster | 11mbps - no problem |
| 16:32.29 | vmaster | 480? tough |
| 16:32.51 | [g2] | How fast is the LVDS stuff |
| 16:40.26 | vmaster | Point-to-point LVDS signaling is possible at speeds of up to 622 Mb/s. |
| 16:40.31 | vmaster | from a xilinx app note |
| 16:44.41 | vmaster | ah, ok, this could be a lot easier |
| 16:45.04 | [g2] | what there's something in the app note ? |
| 16:45.14 | vmaster | with usb 2.0, you use a transceiver |
| 16:45.35 | [g2] | so you just need to handle the 480Mbs bit stream |
| 16:45.38 | vmaster | that takes care of the high-speed serial signal, and offers a parallel interface |
| 16:45.55 | [g2] | sync'd to a clock comming from the transceiver |
| 16:46.12 | vmaster | yep |
| 16:46.25 | vmaster | 60mhz parallel isn't a problem, i guess |
| 16:46.43 | [g2] | 8-bits wide |
| 16:46.45 | vmaster | how much are commercial usb 2.0 analyzers? |
| 16:46.47 | vmaster | yes |
| 16:46.57 | [g2] | at least $1K |
| 16:48.07 | vmaster | could indeed be a nice job for an fpga |
| 16:48.44 | [g2] | having a DDR or SATA intf would be quite cool |
| 16:49.17 | [g2] | 60MBs is quite a heavy data rate |
| 16:49.38 | [g2] | or 15M 32-bit word |
| 16:49.50 | vmaster | ellisys uses 32mb fifo, and an usb 2.0 uplink to the host pc |
| 16:50.45 | [g2] | right that gives you 1 second for up and down |
| 16:51.04 | [g2] | or 2 seconds |
| 16:51.14 | [g2] | isn't usb half-duplex ? |
| 16:51.16 | vmaster | i guess you'd filter the data inside the fpga, and transmit only what is interesting |
| 16:51.52 | [g2] | well there's really 2 classes of problems |
| 16:52.12 | [g2] | 1 protocol issues where filtering would work and just grabbing all the data on the bus |
| 16:52.28 | [g2] | 2) usb PHY issues |
| 16:52.37 | vmaster | ah, ok |
| 16:52.39 | [g2] | which the transceiver would mask |
| 16:53.23 | [g2] | a firewire 800 chip for the data store would be cool :) |
| 16:57.10 | vmaster | hehehe, yeah |
| 17:43.20 | *** part/#openjtag odoc (i=odoc@is.borntobooze.de) |
| 20:23.48 | lennert | [g2]: vhdl coding is going fine |
| 20:23.58 | lennert | [g2]: my current board is just slightly limited |
| 20:41.39 | [g2] | the S3 ? |
| 20:42.10 | [g2] | you've got a 200 or 400 ? |
| 20:43.15 | lennert | xc3s200 iir |
| 20:43.16 | lennert | c |
| 20:43.35 | lennert | i'm not running out of logic but out of ports to use :) |
| 20:43.50 | lennert | vga is working, serial is more-or-less working, ps/2 will be working soon |
| 20:43.57 | lennert | that's really all the board has :) |
| 20:44.39 | dyoung-zzzz | You have those 40-pin I/O connectors. |
| 20:44.45 | lennert | yeah |
| 20:44.48 | lennert | but what to hook up to them? |
| 20:44.54 | lennert | a pci edge connector maybe |
| 20:45.08 | dyoung-zzzz | USB Adaptor? |
| 20:45.16 | dyoung-zzzz | hmm |
| 20:45.23 | lennert | hmmm |
| 20:45.24 | [g2] | a 14-pin and 20-pin ARM JTAG connector |
| 20:45.25 | dyoung-zzzz | more serial ports |
| 20:45.47 | lennert | [g2]: i know where you're going ;) |
| 20:45.51 | dyoung-zzzz | a IDE Hard Drive? |
| 20:46.15 | lennert | i'd really like pci and/or a gigabit ethernet connection |
| 20:46.19 | dyoung-zzzz | Its a minor pain that the S3 inputs are not TTL compatible. |
| 20:46.34 | lennert | dyoung-zzzz: not? |
| 20:47.18 | [g2] | what's the voltage level on the I/Os can we connect directly up to the JTAG on the IXP4xx ? |
| 20:47.23 | dyoung-zzzz | Nope. |
| 20:47.26 | dyoung-zzzz | They are LVTTL only |
| 20:47.52 | dyoung-zzzz | [g2] LVTTL |
| 20:47.58 | [g2] | dyoung-zzzz that should work for us right ? |
| 20:48.11 | dyoung-zzzz | Depends on what youre trying to do. |
| 20:48.20 | dyoung-zzzz | If its talk to a IXP4xx, yes. |
| 20:48.21 | [g2] | JTAG flashing and debugging |
| 20:48.28 | [g2] | nod on the IXP4xx |
| 20:49.04 | dyoung-zzzz | Thats what the CPLD would be for in past desgins we've talked about. To increase the i/o range. |
| 20:49.11 | lennert | dyoung-zzzz: can't you just add a resistor and be done with it? |
| 20:49.50 | [g2] | dyoung-zzzz right. However currently I'm only working with Xscales |
| 20:49.58 | [g2] | IXP4xx's even for now |
| 20:50.22 | [g2] | I've got couple Cirrus boards around though |
| 20:50.23 | dyoung-zzzz | lennert, that would be pretty UBE; but I suppose you could. |
| 20:51.31 | lennert | dyoung-zzzz: hmmm |
| 20:51.50 | dyoung-zzzz | Hmm |
| 20:51.52 | dyoung-zzzz | Actually... |
| 20:52.02 | dyoung-zzzz | the S3 has SelectIO |
| 20:52.04 | lennert | indeed, no TTL |
| 20:52.15 | dyoung-zzzz | so you can do something weird. |
| 20:52.25 | lennert | GTL, HSTL, LVCMOS, LVTTL, PCI, SSTL |
| 20:52.37 | dyoung-zzzz | theres an app note about using SelectIO with TTL using OC |
| 20:52.39 | lennert | (and some differential standards) |
| 20:54.22 | dyoung-zzzz | Aha, and the S3 has internal clamp diods. so you can just limit the current to < 10ma |
| 20:54.41 | dyoung-zzzz | 300ohm should be enough. |
| 20:55.38 | lennert | dyoung-zzzz: ? |
| 20:58.46 | dyoung-zzzz | http://direct.xilinx.com/bvdocs/publications/ds099-2.pdf |
| 20:58.58 | dyoung-zzzz | page 2 |
| 21:00.07 | lennert | yeah i just don't know what the heck you're talking about |
| 21:01.26 | dyoung-zzzz | When the input voltage is greater than VCCO +0.5V, the upper clamp diode turns on and conducts a reverse current into the associated supply (VCCO for non-dedicated I/O; VCCAUX for dedicated I/O). Because this reverse current can damage the I/O, the Spartan-3/-3E I/O is not 5V-tolerant. |
| 21:01.31 | dyoung-zzzz | Spartan-3/-3E I/O can be made 5V-tolerant by using an external series current limiting resistor to limit the current into the upper clamp diode to 10 mA. This makes the input 5V-tolerant, but an I/O configured as an output still cannot drive 5 Volts and the resulting VOH does not meet the input specifications of the 5V device |
| 21:02.01 | dyoung-zzzz | so using a resistor in series to limit the current to < 10ma total will work as you suggested. |
| 21:15.41 | lennert | i was thinking about a voltage divider actually |
| 21:16.11 | lennert | then again, i still don't know what i'm talking about |
| 21:39.49 | dyoung-zzzz | s'pose you could do that too; should be fine for "slow" stuff. |
| 21:40.03 | dyoung-zzzz | Its still UBE. :-) |
| 21:40.14 | lennert | i don't know enough about electronics, really |
| 21:41.33 | [g2] | that makes two of us :) |
| 21:41.50 | lennert | dyoung-zzzz: where did you learn your electron foo? |
| 21:50.41 | dyoung-zzzz | Um... |
| 21:50.54 | dyoung-zzzz | Shocking the hell outta myself mostly... |
| 21:51.32 | lennert | sounds good |
| 21:51.39 | [g2] | heh... and living to tell about it :) |
| 21:51.43 | dyoung-zzzz | Actually when i was a child, my father and I together made a crystal radio. |
| 21:51.51 | lennert | [g2]: that's the 'natural selection' part |
| 21:51.52 | dyoung-zzzz | I thought it was the coolest thing since sliced bread |
| 21:52.03 | dyoung-zzzz | after that; justu a lot of playing around. |
| 21:52.06 | lennert | [g2]: either that or 'intelligent design', which'd mean that the intelligent designer likes dyoung |
| 21:52.11 | dyoung-zzzz | (and zapping the eff outta myself) |