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| 07:14.43 | ka6sox | morning ep1220 |
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| 14:46.59 | vmaster | hmm, anyone awake who could answer me a question about vhdl? i'm a bit confused about what really belongs into the process sensitivity list |
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| 15:07.25 | ep1220 | vmaster: the sensitivity list is equivalent to a "wait on {signals in the sensitivity list} " inserted just before the "end process" |
| 15:14.46 | vmaster | heh, yeah, that's what i read - but xst complains about a signal it doesn't have to wait for |
| 15:14.55 | vmaster | i have a "count-down" counter |
| 15:15.16 | vmaster | with asynch reset, asynch "load" and a parallel input |
| 15:16.08 | vmaster | i get a warning when the parallel input isn't in the sensitivity list |
| 15:16.23 | vmaster | ah |
| 15:16.24 | vmaster | ok |
| 15:16.25 | vmaster | forget about it |
| 15:16.49 | vmaster | i understood it right now |
| 15:18.06 | vmaster | the parallel input has to be in the sensitivity list, as the parallel data will be latched while the asynch load is true - therefor the process runs on any change of the parallel input, too |
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