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| 06:20.08 | ep1220 | ka6sox: ping |
| 06:20.34 | [g2] | ep1220 hey! |
| 06:20.51 | ep1220 | [g2]: hey! |
| 06:21.05 | ep1220 | a late night for You ? :-) |
| 06:21.11 | [g2] | yeah :) |
| 06:21.17 | [g2] | getting ready for some sleep |
| 06:21.31 | [g2] | I got my first proto board last friday |
| 06:21.44 | ep1220 | Found in the log Yu started Your HW company |
| 06:21.56 | ep1220 | congrats |
| 06:21.58 | [g2] | yep |
| 06:22.00 | [g2] | thx |
| 06:22.03 | ep1220 | Proto working OK ? |
| 06:22.12 | [g2] | it's rock'n! |
| 06:22.17 | ep1220 | great |
| 06:22.39 | ep1220 | I am doing a PCB for the FTDI |
| 06:22.47 | [g2] | I was booting to Debian on CF with a supplied kernel on the first day |
| 06:23.15 | ep1220 | so did not even need JTAG ? |
| 06:23.15 | [g2] | the unofficial sarge be port |
| 06:23.46 | [g2] | well when I start playing with boot loaders |
| 06:24.02 | [g2] | JTAG would be nice for debugging |
| 06:25.24 | [g2] | but the board has been wrung out pretty well to start with |
| 06:26.30 | [g2] | Serial, both ethers, MiniPCI, CF all are working |
| 06:26.30 | [g2] | I haven't tried POE |
| 06:26.30 | ep1220 | sounds very good |
| 06:26.42 | [g2] | My 2.6 kernel port is working, but I've got to forward port the CF/IDE driver from 2.4 |
| 06:27.02 | [g2] | however, I've booted to an Openslug jffs2 |
| 06:27.42 | [g2] | so tell me about the PCB ? :) |
| 06:28.12 | ep1220 | It will be for the DLP2232M module. So it is easy to solder |
| 06:28.35 | ep1220 | using levelshifters 1.2 to 3.3V |
| 06:28.35 | [g2] | ah.. those are like $50 ? |
| 06:28.40 | ep1220 | 39$ |
| 06:28.58 | ep1220 | plus serial at 3.3V |
| 06:29.04 | [g2] | cool... |
| 06:29.17 | [g2] | not 5v ? |
| 06:29.26 | [g2] | or RS232 |
| 06:29.32 | ep1220 | JTAG at 5V is also possible, but would need a transistor |
| 06:29.47 | [g2] | I think 3.3 for JTAG is fine |
| 06:29.59 | ep1220 | For ARM, yes |
| 06:29.59 | [g2] | 1.2 to 3.3 range ? |
| 06:30.03 | ep1220 | yes |
| 06:30.18 | ep1220 | but PPC and some DSPs also use lower voltages |
| 06:30.25 | [g2] | excellent |
| 06:30.36 | [g2] | when will protos be ready ? |
| 06:31.08 | ep1220 | Currently I am thinking which JTAG connectors to add |
| 06:31.21 | ep1220 | ka6sox suggeste 14 and 20 pin ARM + Digilent |
| 06:31.37 | [g2] | sounds great to me :) |
| 06:31.49 | ep1220 | personally I do not like having too many connectors on the board |
| 06:31.55 | [g2] | will the pins be configurable at all ? |
| 06:32.09 | ep1220 | Not by SW. |
| 06:32.22 | [g2] | by hw ? |
| 06:32.44 | ep1220 | Currently I think using a 20pin "universal" connector plus external PCBs for adapters. |
| 06:33.18 | ep1220 | I want to support ARM,MIPS,PPC,FPGA, TI And AD DSPs, evt. AVR |
| 06:33.34 | [g2] | ep1220, JTAG king! |
| 06:34.00 | ep1220 | the proto should be ready sometimes next week. |
| 06:34.15 | [g2] | so you going to put macraigor outta business ? :) |
| 06:35.01 | [g2] | pls keep me posted on the status |
| 06:35.05 | ep1220 | not so likely, unless some OS friends write all the needes SW :-) |
| 06:35.12 | ep1220 | needed |
| 06:35.36 | [g2] | I'm quite interested in Xscale :) |
| 06:35.43 | ep1220 | I'll do this |
| 06:36.45 | ep1220 | if you want to pick up some work there, let me know ;-) |
| 06:37.02 | [g2] | I missed that |
| 06:38.04 | ep1220 | A fast FLASH progger for the XSCALE is on top of the TODO list |
| 06:38.42 | [g2] | ah.. a fast flash programmer |
| 06:39.21 | [g2] | the work was on the fast flash programmer ? |
| 06:39.29 | ep1220 | yes |
| 06:40.24 | [g2] | actually, I think the fastest is writting to memory and doing it in sw |
| 06:40.40 | ep1220 | What we said some time ago: Put a stub into the minicache, send data to it, let the XScale do the programming |
| 06:40.49 | [g2] | right. |
| 06:40.50 | ep1220 | Did not mean a HW programmer |
| 06:41.20 | [g2] | no the hw programmer feeds the mini/I/cache and starts the program |
| 06:42.13 | ep1220 | such a soft would also be helpfull for people who can afford wiggler type JTAG only |
| 06:42.14 | [g2] | I think we're saying the same thing |
| 06:42.18 | ep1220 | yes |
| 06:42.43 | [g2] | and possibly have serial available |
| 06:43.13 | ep1220 | serial for what ? |
| 06:43.17 | [g2] | I'll be really interested in the debugging and performance monitoring abilities |
| 06:43.27 | [g2] | input/output feedback |
| 06:43.39 | ep1220 | I see |
| 06:43.44 | [g2] | although maybe that can be brought back through the JTAG |
| 06:44.02 | [g2] | it depends on the host appliation |
| 06:44.24 | ep1220 | rigth and likely at higher speed (on JTAG) |
| 06:44.52 | ep1220 | on the other side: once You have RAM running |
| 06:44.57 | ep1220 | and EThernet |
| 06:45.19 | ep1220 | debugging on the system itself should be more comfortable |
| 06:45.27 | ep1220 | esp. for profiling |
| 06:45.36 | [g2] | it's to capture the hangs |
| 06:45.57 | [g2] | break-in and see what was happening or where things are looping |
| 06:46.19 | ep1220 | yeah, there JTAG has a big advantage |
| 06:47.07 | ep1220 | IIRC your Loft has a 14pin JTAG header ? |
| 06:47.22 | [g2] | nod and there's some extra pins there |
| 06:48.08 | [g2] | that's why I asked about the configuration earlier |
| 06:48.33 | [g2] | ok it's 14-pins just some are used for something else :) |
| 06:48.39 | [g2] | no "extra" pins |
| 06:48.48 | [g2] | cause then it wouldn't be 14 |
| 06:48.58 | [g2] | it'd be > 14 :) |
| 06:49.01 | ep1220 | that was already puzzling me :-) |
| 06:58.45 | [g2] | nite |
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| 18:59.58 | ka6sox-lunch | oops..that should have been |
| 19:00.05 | ka6sox-lunch | ep1220: ping! |
| 19:57.43 | ep1220 | ka6sox-lunch: pong |
| 19:57.51 | ka6sox-lunch | hi there. |
| 19:57.59 | ep1220 | hello |
| 19:57.59 | ka6sox-lunch | been meaning to catch up with you. |
| 19:58.16 | ka6sox-lunch | reviewed the schematic...looks good but I have a couple of questions. |
| 19:58.29 | ep1220 | please ask |
| 19:58.56 | ka6sox-lunch | we could reduce the cost by just putting the 3 parts on the PB part directly on our board...any reason why not to? |
| 19:59.28 | ep1220 | PB = DLP2232M ? |
| 19:59.35 | ka6sox-lunch | yes |
| 20:00.08 | ep1220 | The cost of the parts on this module is approx. 12$ |
| 20:00.29 | ep1220 | but then we need a multilayer + professional manufacturing |
| 20:00.42 | ka6sox-lunch | okay...and the cost of the other parts is about the same...$12 |
| 20:01.40 | ep1220 | sounds right |
| 20:02.11 | ka6sox-lunch | Board about $20/ea in small q's |
| 20:02.36 | ka6sox-lunch | so we have $50 approx invested. |
| 20:03.28 | ep1220 | yes |
| 20:04.09 | ka6sox-lunch | the board is going to cost us no more to build with the parts on it (the 2232 parts) |
| 20:05.11 | ka6sox-lunch | (since we already have so many pins already) |
| 20:05.37 | ep1220 | when we put the FTDI2232 directly on the PCB we likely need a 4 layer board |
| 20:05.39 | ep1220 | > PCB price is higher |
| 20:05.50 | ka6sox-lunch | nope..still only 2layer |
| 20:06.17 | ka6sox-lunch | material cost isn't that much |
| 20:06.32 | ep1220 | the 2232 module is 4 layers |
| 20:06.37 | ka6sox-lunch | the real cost is in setup and any "odd" drill sizes. |
| 20:07.02 | ka6sox-lunch | only because of how many pins they wanted brought out to different places. |
| 20:07.26 | prpplague | did you guys see that datasheet about using the cypress ez-usb module as a high speed jtag? |
| 20:07.45 | ka6sox-lunch | yes...but the IP is too expensive. |
| 20:07.57 | prpplague | IP? |
| 20:08.14 | prpplague | wasn't aware there was any IP attached to it |
| 20:08.15 | ka6sox-lunch | the software in the cypress SDK |
| 20:08.19 | ka6sox-lunch | (to mod it) |
| 20:08.27 | ep1220 | prpplague: I saw a project, USB + FPGA; |
| 20:08.43 | prpplague | ka6sox-lunch: i must have missed something |
| 20:09.01 | prpplague | ka6sox-lunch: i have several fx2 based boards and i don't use the cypress sdk |
| 20:09.21 | ka6sox-office | k |
| 20:09.23 | ep1220 | my understanding was this was a "project" and they were looking for an OEM |
| 20:09.29 | ka6sox-office | ah |
| 20:09.50 | ka6sox-office | in our case we want to explore the FT2232 part (which I like too!) |
| 20:10.16 | ka6sox-office | there is a kernel module for it. |
| 20:10.34 | prpplague | ka6sox-office: yea i was just curious as i had planned to test jtag with the fx2 chipset this comming weekend |
| 20:10.55 | ka6sox-office | cool. |
| 20:11.14 | prpplague | http://www.linux-usb.org/ezusb/ |
| 20:11.39 | vmaster_ | the cypress parts are the ones with integrated 8051, right? |
| 20:11.57 | prpplague | vmaster: yea |
| 20:12.24 | prpplague | vmaster: lots of cheap devices on the market use it |
| 20:12.28 | prpplague | vmaster: easy to hack |
| 20:13.27 | vmaster | hmm... is that micro powerful enough to handle usb comms AND serialize the jtag stream? |
| 20:13.53 | vmaster | or do they use additional logic to do the serializing? |
| 20:14.09 | prpplague | vmaster: keyspan uses it for high speed rs-232 ports up to 450kbaud |
| 20:15.19 | vmaster | yeah, but a usb 2.0 jtag device could go up to 20-40 mhz jtag tck |
| 20:15.35 | prpplague | vmaster: several external ide to usb devices use it |
| 20:16.14 | prpplague | vmaster: yea, i don't have any hard data other than i've reference for several ppl using it for jtag debugging |
| 20:17.27 | prpplague | and for the cost, its got to be better than a wiggler |
| 20:20.00 | vmaster | just checked, i got my ft2232 to about 900kHz TCK full-duplex - but I suspect that either the drivers, or the linux usb stack (or both...) suck |
| 20:20.54 | vmaster | a wiggler achieves about 200kHz |
| 20:43.02 | prpplague | vmaster: yea i was reading over some references, from the geda list |
| 20:43.36 | prpplague | vmaster: someone there posted said they got about 450kHz with the ez-usb 1.1usb version |
| 20:44.21 | vmaster | i guess the ft2232 has an advantage because of its dedicated mpsse - the 8051 probably did this in sw |
| 20:45.17 | prpplague | yea thats what i gather |
| 20:45.58 | prpplague | vmaster: but that is also the older ez-usb device |
| 20:46.07 | prpplague | vmaster: the fx2 is 2.0 high speed |
| 20:47.36 | prpplague | hmm seems there is already some software out there for ez-usb jtag device |
| 20:48.40 | prpplague | vmaster: http://lapwww.epfl.ch/dev/arm/jelie/ looks like jelie already has some support for the ezusb |
| 20:50.01 | vmaster | iirc, they're doing it through bit-banging |
| 20:50.18 | prpplague | vmaster: yea gpio |
| 20:51.31 | vmaster | a wiggler is probably a lot faster then |
| 20:52.35 | vmaster | parport aint that bad for jtag - at least you have low latency :) |
| 20:52.46 | prpplague | yea |
| 20:53.27 | prpplague | vmaster: i was just mainly looking at the jtag aspect as an after thought, i was making the ez-usb based device for bit-banging nand flash devices on my desktop |
| 20:53.31 | vmaster | for high speed, i'd add a cpld to the fx2 - the fx2 handles the buffers, while the cpld takes care of the serializing |
| 20:53.55 | vmaster | ah, ok |
| 20:54.43 | vmaster | hmm... everything i say in this channel gets logged, right? |
| 20:55.01 | prpplague | yea purl does a log |
| 21:00.18 | prpplague | purl: log |
| 21:00.20 | purl | rumour has it, log is as piece of wood |
| 21:00.26 | prpplague | purl: smart ass |
| 21:00.30 | vmaster | i'm trying to create a new config for amontec's chameleon that i can add as a interface to my software - theoretically i could add support for the standard raven config, but i figure macraigor wouldn't like that |
| 21:00.35 | vmaster | purl: help? |
| 21:00.37 | purl | it has been said that help is /msg purl help |
| 21:01.06 | prpplague | http://purl.rikers.org/ |
| 21:05.58 | vmaster | ah, thx |
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