irclog2html for #openjtag on 20050611

`00:59.10`	`*** join/#openjtag Tiersten_ (tman@Tiersten.nslu2-linux)`
`03:55.07`	`*** join/#openjtag JMunakra (~JMunakra@dsl-084-059-197-215.arcor-ip.net)`
`07:03.11`	`*** part/#openjtag dyoung (~dyoung@dyoung.nslu2-linux)`
`08:58.30`	`*** join/#openjtag Jacmet (~jacmet@50C59F0E.flatrate.dk)`
`11:15.20`	`*** join/#openjtag [g2] (~g2@g2.nslu2-linux)`
`11:22.37`	`*** join/#openjtag JMunakra (~JMunakra@dsl-084-059-200-103.arcor-ip.net)`
`12:14.29`	`*** join/#openjtag ep1220 (~NN@gate.epatec.at)`
`12:15.10`	`ep1220`	`[g2]: ping`
`12:58.59`	`[g2]`	`ep1220, Pong!`
`12:59.17`	`ep1220`	`HI, did you receive my e-mail ?`
`12:59.34`	`[g2]`	`AH... yes...`
`12:59.37`	`[g2]`	`THX`
`12:59.47`	`[g2]`	`I just saw it after you mentioned it`
`12:59.57`	`ep1220`	`i believe you can forward to beewoolie ?`
`13:00.21`	`[g2]`	`absolutely`
`13:00.27`	`ep1220`	`THX.`
`13:00.58`	`[g2]`	`NP, Thank-you !`
`13:01.24`	`ep1220`	`You can also inlcude my e-mail.`
`13:01.35`	`[g2]`	`ok`
`13:06.04`	`[g2]`	`Looks great!`
`13:06.10`	`[g2]`	`I like the pics too`
`13:06.37`	`ep1220`	`hope they save questions were to connect which wire :-)`
`13:07.29`	`ep1220`	`on the pics there are some LEDS which are not really needed.`
`13:07.49`	`ep1220`	`primarily, to give m fast feedback during development`
`13:12.44`	`[g2]`	`other than review (of which I'm not qualified :( ) what are you planning to do with the design ?`
`13:13.20`	`ep1220`	`no real plan.`
`13:13.40`	`ep1220`	`still want to look into S3/usb`
`13:14.04`	`ep1220`	`well, i could make PCBs.`
`13:14.05`	`[g2]`	`nod.. me too. I think long-term that's the right direction`
`13:14.34`	`ep1220`	`but work and 1xcost would require at leaast 20 takers`
`13:17.20`	`[g2]`	`I still have to figure out why the current digilent isn't working`
`13:17.29`	`[g2]`	`I'll look at that either today or tomorrow`
`13:18.44`	`ep1220`	`maybe there is a bad solderpoint`
`13:19.03`	`ep1220`	`you can compare the wires with my pics.`
`13:19.22`	`[g2]`	`maybe... I think they also attached to the via's`
`13:19.44`	`ep1220`	`I soldered to the Resistor pads.`
`13:20.16`	`ep1220`	`ime vias are hard to solder to (at least with my tools)`
`13:20.27`	`ep1220`	`it can stick but make no contact.`
`13:20.37`	`[g2]`	`well the ppl that did the re-work do that professionally`
`13:21.05`	`ep1220`	`Do You have a voltmeter ?`
`13:21.06`	`[g2]`	`the replaced the memory chips to the 16M16 versioins`
`13:21.10`	`[g2]`	`yes`
`13:21.39`	`ep1220`	`So Yu can check connection header -> SMD resitors`
`13:23.57`	`ep1220`	`Do you have more than 1 modified slug ?`
`13:24.29`	`[g2]`	`right now I've got 1 with 64MB`
`13:24.56`	`ep1220`	`and only 1 with JTAG i asume`
`13:27.12`	`[g2]`	`I've got an OEM board that has JTAG for reflashing`
`13:27.29`	`ep1220`	`and diglent works there ?`
`13:27.58`	`[g2]`	`interestingly no, but I think that's because of the RESET line`
`13:28.40`	`[g2]`	`the digilent cable does work with the S3 fine though`
`13:28.47`	`[g2]`	`and from the same computer`
`13:29.04`	`[g2]`	`using the same tools (jtag)`
`13:29.37`	`ep1220`	`the OEM boots up when nothing is connected to the JTAG header ?`
`13:29.44`	`[g2]`	`yes`
`13:30.07`	`ep1220`	`then leaving RESET and TRST open must not cause problems.`
`13:30.23`	`ep1220`	`Maybe it is Your adapter digilent -> 14pin.`
`13:30.32`	`[g2]`	`that's standard ARM JTAG connector`
`13:30.42`	`[g2]`	`maybe ?`
`13:31.27`	`ep1220`	`if you have 2 boards no work it might be even likely ;-)`
`13:31.54`	`[g2]`	`but that's a different board from the NSLU2 (it has an ixp422, so it is very similar)`
`13:32.10`	`[g2]`	`well it was two different connections`
`13:32.17`	`[g2]`	`there's a header for the nslu2`
`13:32.37`	`[g2]`	`and I created a patch connector between the digilent and a 14-pin cable`
`13:33.00`	`ep1220`	`maybe this patch connector is the problem ?`
`13:33.22`	`[g2]`	`It could very well be that the TDI and TDO for the ARM board are cross with respect to the Digilent cable`
`13:34.05`	`ep1220`	`might be. or the digilent does not firmly connect to Your patch-adapter (?)`
`13:34.39`	`[g2]`	`that seemed pretty good to me but it is possible`
`13:34.58`	`ep1220`	`Also might be the OEM does not have VCC at pins 1 an 13, but these are open.`
`13:35.00`	`[g2]`	`I buzzed the lines with the voltmeters connectivity tester`
`13:35.23`	`[g2]`	`right`
`13:35.33`	`[g2]`	`that's the more likely case`
`13:36.05`	`ep1220`	`you can check with voltmeter.`
`13:36.15`	`[g2]`	`nod.`
`13:36.44`	`ep1220`	`a "real" JTAG should have VCC, many (professional) adapters need power from the target`
`13:37.01`	`ep1220`	`or at least measure it to set the level-shifters`
`13:39.25`	`[g2]`	`I was very close on my last JTAG soldering attempt on the NSLU@`
`13:39.44`	`[g2]`	`then pulled off a pad`
`13:40.39`	`ep1220`	`oops`
`13:41.19`	`[g2]`	`risks for the advancement of science !`
`13:42.53`	`ep1220`	`You deserve a medal for "researching wihout any sign of fear" :-)`
`13:43.40`	`[g2]`	`hardly`
`13:44.24`	`[g2]`	`when at my last startup I had a $25K development system for a network processor`
`13:44.51`	`[g2]`	`so risking $80 on a device pales in comparison`
`13:45.19`	`[g2]`	`it was another $20K for the sw on the development system`
`13:46.11`	`ep1220`	`and ... did You kill it ?`
`13:46.25`	`[g2]`	`no.`
`13:46.42`	`[g2]`	`but we did put wires on many $20K boards`
`13:48.00`	`[g2]`	`It much more fun working on the little stuff`
`13:48.06`	`[g2]`	`it's all basically the same`
`13:48.27`	`ep1220`	`yes`
`13:50.09`	`ep1220`	`I just look at the FTDI Linux driver.`
`13:50.31`	`ep1220`	`Kernel 2.6 not tested. only tested with mandrake.`
`13:50.45`	`ep1220`	`If it does not work, remove the serial driver , ..`
`13:50.48`	`ep1220`	`:-(`
`13:51.05`	`ep1220`	`seems low in their priorities`
`13:51.08`	`[g2]`	`Linux drivers we can fix`
`13:51.15`	`ep1220`	`but they give no source`
`13:51.37`	`[g2]`	`for FTDI, I think we can turn a host into a USB 1.1 analyzer`
`13:52.32`	`ep1220`	`we can log USB commands.`
`13:52.41`	`[g2]`	`nod.`
`13:52.45`	`ep1220`	`but this is not funny.`
`13:53.10`	`[g2]`	`what's that ?`
`13:53.43`	`ep1220`	`this is no fun (is better english ?)`
`13:53.50`	`[g2]`	`Ah...`
`13:53.52`	`[g2]`	`yes`
`13:54.09`	`[g2]`	`"but this is not fun"`
`13:54.22`	`ep1220`	`learned something`
`13:56.05`	`[g2]`	`the two real important things about this are`
`13:56.24`	`[g2]`	`1) You've figured out how things work`
`13:56.32`	`[g2]`	`2) You've actually verified it`
`13:56.49`	`[g2]`	`so now there's another working model`
`13:58.06`	`ep1220`	`I use an FTDI driver. Do not send data directly to USB bus`
`13:58.56`	`*** join/#openjtag JMunakra (~JMunakra@dsl-084-059-201-187.arcor-ip.net)`
`14:04.01`	`[g2]`	`ep1220, if you sent stuff directly to the USB bus there would be no need for monitoring :)`
`14:04.20`	`ep1220`	`agree`
`14:09.42`	`JMunakra`	`I want to start doing FPGA stuff and install the Xilinx WebPack, but the qemu linux emulation is incredibly slow on my 800 MHz powerbook :)`
`14:12.21`	`[g2]`	`I'll see you guys later`
`14:12.26`	`[g2]`	`cheers`
`15:49.56`	`*** join/#openjtag JMunakra (~JMunakra@dsl-084-059-201-187.arcor-ip.net) [NETSPLIT VICTIM]`
`15:49.56`	`*** join/#openjtag ep1220 (~NN@gate.epatec.at) [NETSPLIT VICTIM]`
`15:49.56`	`*** join/#openjtag pjames (~jcouzens@mail.lost-carrier.com) [NETSPLIT VICTIM]`
`15:53.33`	`*** join/#openjtag JMunakra (~JMunakra@dsl-084-059-201-187.arcor-ip.net) [NETSPLIT VICTIM]`
`15:53.33`	`*** join/#openjtag ep1220 (~NN@gate.epatec.at) [NETSPLIT VICTIM]`
`15:53.33`	`*** join/#openjtag pjames (~jcouzens@mail.lost-carrier.com) [NETSPLIT VICTIM]`
`16:18.05`	`*** join/#openjtag ka6sox-office (~tking@netblock-66-159-209-52.dslextreme.com)`
`16:18.25`	`ka6sox-away`	`there you are...`
`16:19.53`	`cbpage`	`it's tooo early. even though it's saturday...`
`16:20.19`	`ka6sox-away`	`especially since its Saturday.`
`16:20.23`	`cbpage`	`point`
`17:32.39`	`*** join/#openjtag [g2] (~g2@g2.nslu2-linux)`

Generated by irclog2html.pl by Jeff Waugh - find it at freshmeat.net! Modified by Tim Riker to work with blootbot logs, split per channel, etc.