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| 18:54.27 | jamie | Hello! |
| 18:54.58 | [g2] | howdy ! |
| 18:55.24 | [g2] | jacques, welcome and check out and check out http://www.openjtag.net |
| 18:57.08 | [g2] | jamie out task here is to workout an OpenJTAG mechanism to allow for flash programming and CPU debugging |
| 18:57.27 | jamie | Mmm, HostInterfaces doesn't mention a plain parallel port ;-0 |
| 18:57.47 | [g2] | We've been using that now |
| 18:58.00 | [g2] | digilentinc sell the $19 parallel cable |
| 18:58.25 | [g2] | it currently takes 40-50 minutes with that to reflash the 256K redboot in the NSLU2 |
| 18:58.41 | jamie | Btw, the EZUSB is very nice to work with, and AFAIR doesn't need a dev kit. |
| 18:59.01 | [g2] | funny you should mention that :) |
| 18:59.13 | [g2] | ep1220, has the FTDI working for both serial and JTAG |
| 18:59.43 | [g2] | we'll soon be trying to load the mini-I cache of the IXP420 on the NSLU2 directly with it |
| 19:00.15 | [g2] | He was going to be doing some testing this past weekend |
| 19:00.37 | jamie | Does the IXP BSR not have "short cut" switches, to reduce the length for common operations? |
| 19:00.52 | [g2] | :) basically there's a special line for loading the i-cache up |
| 19:01.01 | [g2] | ep1220, found it in the development manual |
| 19:01.24 | [g2] | the mini I cache is only 33bits a word versus 498 for the BSR |
| 19:01.49 | [g2] | the test this past weekend was to verify that it could actually be loaded |
| 19:04.25 | jamie | Are you really only targetting the one device so far? I thought openjtag was further along that that, or maybe I'm confusing it with the thing from gEDA. |
| 19:07.13 | jamie | g2: anyway, you asked about FPGA... I'm curious what have you in mind? |
| 19:08.00 | [g2] | I think there are two things |
| 19:08.43 | [g2] | Ideally we wanted to use an Spartan 3 as our intelligent front-end to the Device-Under-Test |
| 19:09.02 | jamie | (btw, what's your relationship with jtagtools?) |
| 19:09.08 | jamie | Makes sense. |
| 19:09.09 | [g2] | however, since we're mostly a bunch of firmware ppl we didn't get to far :( |
| 19:09.17 | jamie | Why, it's just firmware :) |
| 19:09.26 | [g2] | speed |
| 19:09.50 | jamie | I mean, what was the problem with the Spartan 3? |
| 19:09.54 | [g2] | We currently use jtagtools for re-flashing |
| 19:10.24 | [g2] | nothing is wrong with the S3, our FPGA programming skills are what's lacking :) |
| 19:10.33 | jamie | Is openjtag a separate project, and if so why? Or are you the same folks, doing something a bit different? |
| 19:11.07 | [g2] | openjtag on sf ? |
| 19:11.54 | [g2] | openjtag on SF and this project are one in the same |
| 19:12.13 | jamie | I mean: is openjtag.net a separate project from jtagtools.sf.net, and if so why (since they seem very similar in goals). |
| 19:12.50 | [g2] | jtagtools is all sw based with a couple wigglers |
| 19:13.15 | jamie | So you're building better hardware-assisted wigglers? |
| 19:13.19 | [g2] | we are looking to do both flashing and JTAG debugging and at high-speed |
| 19:13.30 | [g2] | that's the plan |
| 19:13.47 | jamie | So exactly the same as jtagtools' goals, but with hardware-assist to make it faster? |
| 19:13.47 | [g2] | but like Mike Dell says "Ideas are easy, execution is hard" :) |
| 19:13.53 | jamie | yeah, i know :) |
| 19:13.55 | [g2] | nod. |
| 19:14.08 | [g2] | I don't think jtagtools does debugging though |
| 19:14.48 | jamie | I guess the key thing for the _long_ time would be to find the right abstactions for a jtag library, so that debugging/loading flash/connectivity/anything else can go on one side of those abstractions, and simple wigglers/fancy clever wigglers can go on the other side. |
| 19:15.32 | [g2] | right. The current design has a CPLD to allow for various voltage levels and connections for different devices |
| 19:15.40 | [g2] | there are really two things in play right now |
| 19:16.14 | [g2] | 1) A generic device that can adapt to multiple difference voltage levels and pinouts |
| 19:16.24 | [g2] | 2) A specific device for the NSLU2 |
| 19:16.50 | [g2] | the NSLU2 really being the Xscale IXP4xx line |
| 19:17.18 | [g2] | I'm ready to sell reworked units that have a serial and JTAG connection |
| 19:17.55 | [g2] | I'm starting with a level shifter for the serial and a parallel for the JTAG but I'd like to switch quickly to a USB device that does both |
| 19:18.06 | [g2] | ep1220, may be able to provide such a device |
| 19:18.37 | jamie | What's the USB device made of? |
| 19:18.46 | [g2] | and FTDI chip |
| 19:18.51 | [g2] | an FTDI chip |
| 19:19.30 | jamie | Ah, EZUSB looks infinitely more versatile than FTDI... am I mistaken? |
| 19:20.20 | [g2] | EZUSB uses and FTDI chip last I checked |
| 19:20.25 | [g2] | EZUSB uses a FTDI chip last I checked |
| 19:20.52 | jamie | EZUSB is a single chip from Cypress. Do you mean FTDI use an EZUSB? That would be quite nice and reprogrammable :) |
| 19:21.27 | [g2] | Ok... I'm wrong about the EZUSB... That's the CY68C013 right ? |
| 19:21.30 | [g2] | for $149 ? |
| 19:22.50 | [g2] | I confused that with the EZNIOSUSB or EZUSBNIOS which is $99 and uses the FTDI chip |
| 19:22.50 | jamie | it's nothing like that expensive - it's used in cheap consumer parts. |
| 19:22.50 | [g2] | The S3 development board from digilent is $99 + $49 for a USB2.0 with a CY68C013 on it |
| 19:22.51 | jamie | AN21XX or CY7C646XX... |
| 19:22.54 | [g2] | so the S3 dev kit is a much better deal than the EZUSB |
| 19:23.17 | [g2] | ep1220, has reporgrammed the CY68C013 on the USB daughterboard already |
| 19:23.30 | [g2] | as he's got the developers kit for that part iirc |
| 19:26.21 | jamie | I was thinking of something like http://www.devasys.com/usbi2cio.htm |
| 19:26.29 | jamie | But yeah, if he's got the dev kit why not? |
| 19:27.17 | [g2] | there's a big difference between 12Mbs and 480Mbs |
| 19:28.44 | jamie | Depend how fast your JTAG is going to be. But yes of course; I'm merely illustrating that the EZUSB chips themselves aren't expensive, and from having programmed one they're quite versatile (C programmable). |
| 19:29.13 | [g2] | nod. We've talked about lots of different options |
| 19:29.24 | jamie | Looking at FTDI's knowledgebase I see their driver already provides JTAG functions. Well, I guess we can all go home then :) |
| 19:29.28 | [g2] | currently there are 3 options on the table |
| 19:29.46 | [g2] | 1) the cheap / slow / non-debugging enabled parallel devices |
| 19:29.58 | [g2] | 2) The FTDI based device ep1220 is working on |
| 19:30.14 | [g2] | 3) The S3 which can be fast but is non-working :) |
| 19:30.25 | [g2] | due to lack of FPGA programming |
| 19:30.33 | [g2] | not any real HW issues |
| 19:31.05 | jamie | Why can't you debug with (1)? I've certainly debugged boards with a parallel device... |
| 19:31.19 | [g2] | We may be able to |
| 19:31.33 | [g2] | I haven't looked deeply in the JTAG tools |
| 19:32.09 | [g2] | I'm sure the response will be slower than an FPGA |
| 19:32.30 | [g2] | I don't know the JTAG interface well enough to know how much it matters |
| 19:32.49 | jamie | Of course, a lot slower. But it makes sense to build sw which has all the same features, but slower, when using the most basic kit. |
| 19:33.07 | [g2] | well I think there are 2 worlds |
| 19:33.10 | jamie | With JTAG you pretty much can just write/read the BSL register. |
| 19:33.48 | jamie | (There's a few other kinds, like reading ID, and flipping switches to effectively address a different BSL register) |
| 19:33.52 | [g2] | world 1 is generic open source where budget is a huge factor and time is as available |
| 19:34.08 | [g2] | BSL or BSR |
| 19:34.15 | jamie | er, yes :) |
| 19:34.30 | jamie | are you in world 1 or 2? |
| 19:34.36 | [g2] | world 2 is the professional or semi-professional development world |
| 19:34.53 | [g2] | I'm in 2 |
| 19:35.13 | [g2] | I've been doing 1 and enjoy it a bunch |
| 19:35.18 | jamie | I'd say that good sw tools can make a big difference. I did some connectivity testing on a large board (the one with 36 FPGAs), where 5/8 of the boards had connectivity problems |
| 19:35.21 | [g2] | but it needs a lot more rigor |
| 19:35.41 | [g2] | right |
| 19:35.42 | jamie | We had only the most basic parallel port JTAG interface (Altera's design), and I had to write the sw tool. |
| 19:35.59 | [g2] | there are lots of ways to slice the pie |
| 19:36.04 | jamie | But I did find some nice ways to optimise the test patterns to converge on the board errors, which we then confirmed with a microscope and fixed... |
| 19:36.20 | [g2] | nod. |
| 19:36.29 | [g2] | That's what good process is all about |
| 19:37.29 | [g2] | I'd like to incorporate JTAG testing in the manufacture / rework of the boards I'll be doing |
| 19:38.05 | jamie | Point being that optimisation of the JTAG sequencing is sometimes possible. I'd like to see/write a nice generic optimisation tool that, given descriptions of the target, and a set of actions to be performed, finds the shortest sequences to do it. |
| 19:38.33 | [g2] | I think that's way out |
| 19:38.54 | jamie | Way out stupid or way out in the radical? |
| 19:39.06 | [g2] | now way-out in the time horizon |
| 19:39.14 | [g2] | it's a good choice |
| 19:39.20 | [g2] | but it's a little like talking about AI |
| 19:39.33 | jamie | No, it's more like low-level compiler optimisation. |
| 19:39.57 | [g2] | I fully understand. I built compilers for several years |
| 19:40.34 | [g2] | I'm just saying that the state-of-the-art at the price/performance level is a long way out |
| 19:40.42 | jamie | Simple stuff, like "I need to output these values on lines A,B,C,D,E,F of chip X and don't care what bits are set for lines G, H and I (so the BSR doesn't have to be fully shifted each time round)" |
| 19:41.19 | [g2] | we're coming at the problem from opposite sides |
| 19:41.56 | [g2] | you're coming at it from attempting to optimize the operation to a given device which will take lots of device specific knowledge and programming |
| 19:42.26 | jamie | Obviously the most useful bit of hw kit would be something with a chip which can be bought once and reprogrammed as the sw tools advance and new programming strategies become apparent. |
| 19:42.32 | [g2] | I'm coming at it from the intelligent device where shifting 498 bits on an FPGA running 50 or 100Mhz isn't a big operation |
| 19:43.02 | [g2] | and that reprogramming per device is exactly the reason for using the FPGA approach |
| 19:43.45 | [g2] | it's a big performance envelope so for the next year or so makes a decent investement |
| 19:43.51 | jamie | I think it's rare that you need to shift in 498 bits (or the equivalent) on any device that needs a lot of Flash words to be written. Surely every chip would have a short cut for bulk programming. |
| 19:44.09 | jamie | I agree the FPGA approach would be fastest. |
| 19:44.29 | jamie | Ideally, you want to pump bytes at it from the computer, and it has the programming algorithm (or at least some good primitives). |
| 19:44.32 | [g2] | which brings us back to the need for the FPGA programmer :) |
| 19:44.50 | jamie | yeah. any money in it? ;) |
| 19:44.54 | [g2] | not yet |
| 19:45.01 | jamie | doh, so often the way ) |
| 19:45.03 | jamie | :) |
| 19:45.19 | [g2] | I'm just launching the hw company |
| 19:45.31 | jamie | What sort of kit are you selling? |
| 19:45.43 | [g2] | I'll be selling a re-worked NSLU2 |
| 19:46.40 | jamie | That think which looks like a miniature air-con unit? :) |
| 19:47.12 | [g2] | are you familiar with the NSLU2 at all ? |
| 19:47.23 | jamie | No, not at all, I'm looking at linksys.com now... |
| 19:47.54 | [g2] | http://www.nslu2-linux.org/wiki/Info/PhotosOfTheInternals |
| 19:48.13 | [g2] | we should add dimensions to that page |
| 19:48.15 | jamie | The stuff about "share music, video files..." reminds me of what I'm working on, which is a media player which _plays_ music and video files over a LAN and doesn't have any storage itself... |
| 19:48.36 | [g2] | it's all done with the nslu2 |
| 19:48.53 | [g2] | ppl are using it for a video server front-end |
| 19:48.57 | jamie | (based on a sigma designs chip) |
| 19:49.23 | jamie | Does it have audio output? |
| 19:49.26 | [g2] | Twonky vision gives away the streaming music and sells the video streaming version for $19 |
| 19:49.40 | [g2] | no but it has 2 USB 2.0 ports |
| 19:49.57 | [g2] | and 100Mbs ethernet |
| 19:50.22 | jamie | So Twonky's "streaming music" and "streaming video" is intended to stream to...? A PC? A "media adaptor" thingy? |
| 19:50.22 | [g2] | ppl have plugged in the USB Sound blaster and other audio usb devices iirc |
| 19:50.36 | [g2] | to a media adaptor thingy |
| 19:51.04 | [g2] | no pc needed as the nslu2 (slug is our pet name) provides both storage via the external USB 2.0 disk and the streaming capability |
| 19:51.07 | jamie | I ask because some media adaptors are quite capable of USB storage themselves. |
| 19:51.20 | [g2] | like the TIVO :0 |
| 19:51.22 | [g2] | :) |
| 19:51.27 | jamie | Cheaper stuff than that. |
| 19:51.42 | jamie | There's a "USB hard drive" which happens to have a video output, for example... |
| 19:51.54 | [g2] | nod. |
| 19:52.01 | [g2] | there's tons of stuff out there |
| 19:52.31 | jamie | Then there's the kit I'm working on which is for commercial displays, and costs about $145/board. |
| 19:52.31 | [g2] | this is basically in the <$100 server market |
| 19:52.58 | jamie | Certainly, there should be a market for _generic_ USB/ethernet connecting devices... |
| 19:53.13 | [g2] | If I were you, I'd probably use the slug with a usb-vga/tv adapter |
| 19:53.26 | jamie | I.e. something that can go on a LAN where you can put any old USB device on the other side. |
| 19:54.25 | [g2] | if there was a usb-vga adapter then slug could act as a thin-client |
| 19:54.30 | jamie | (such as USB printers etc.) |
| 19:54.47 | [g2] | ppl already run CUPS on the device |
| 19:55.15 | [g2] | our community has more than 3500+ ppl in it |
| 19:55.20 | [g2] | it's a pretty active bunch |
| 19:55.36 | [g2] | our community web site is http://www.nslu2-linux.org |
| 19:55.37 | jamie | Ah, nice :) |
| 19:55.58 | [g2] | I think we've got more developers on the nslu2 than Linksys has employees |
| 19:56.02 | [g2] | literally |
| 19:56.03 | jamie | :) |
| 19:56.24 | jamie | Does it have enough RAM to be a thin client? |
| 19:56.33 | [g2] | not yet :) |
| 19:57.58 | jamie | Well, unless it's _very_ thin :) |
| 19:58.14 | jamie | So you're thinking of selling h/w programmers to program this device, yes? |
| 19:58.42 | [g2] | actual device + programmers dev tools |
| 19:58.51 | [g2] | complete development kit |
| 19:58.58 | [g2] | it's all ready to go |
| 19:59.13 | [g2] | just some final tweaks |
| 19:59.27 | jamie | Now, if only your h/w programmer had both ethernet and a USB port... wouldn't that be handy? :) |
| 19:59.56 | [g2] | actually, the NSLU2 can be a front-end for a USB host device |
| 20:00.22 | [g2] | so really you can have a full web-serving device controlling the programmer for $80 |
| 20:00.37 | jamie | Does the NSLU2 have enough GPIOs that it could be the programmer itself (with a level converter or so?) |
| 20:00.47 | jamie | I.e. one NSLU2 programming the other... |
| 20:00.56 | [g2] | we talked about that |
| 20:01.09 | jamie | It would certainly be very versatile. |
| 20:01.31 | [g2] | they could be scraped up, but the bit banging would be relatively slow |
| 20:01.48 | jamie | How slow is it? |
| 20:01.55 | [g2] | it's only 266Mhz |
| 20:02.14 | [g2] | 32K I-cache and 32K D-cache |
| 20:02.17 | jamie | More importantly: how fast is it safe to bit-bang the JTAG on it? |
| 20:02.34 | jamie | And can the other one approach that speed? |
| 20:02.35 | [g2] | 6 to 10 Mhz |
| 20:03.11 | jamie | Next question: does it have any accessible GPIOs that are fast? |
| 20:03.38 | [g2] | so at 266Mhz you've go 26 instructions |
| 20:03.41 | jamie | I.e. where writing a memory location or two on the CPU is all it needs... |
| 20:03.41 | jamie | (As opposed to the slow sort of GPIO where I2C or something is needed) |
| 20:04.10 | [g2] | I think it sits on the North-side of the amba bus which runs at 133 |
| 20:04.17 | jamie | 26 instructions sounds like a lot, if there are usable memory-mapped GPIOs... I don't know much about the chip. |
| 20:04.36 | [g2] | I'm saying 266/10Mhz = 26.6 |
| 20:04.43 | jamie | (Bear in mind most of the big-banging is writing, so not delayed the way reading is) |
| 20:04.54 | JMunakra | jamie: have a look at http://sourceforge.net/projects/jtagpack/ |
| 20:05.07 | JMunakra | yet another jtag software, hah |
| 20:05.41 | jamie | gee, someone should have a web page listing all the free jtag software :) |
| 20:05.54 | [g2] | JMunakra, you've do the debugging for the ARM7 right ? |
| 20:06.00 | JMunakra | yeah |
| 20:06.06 | [g2] | was that via the parallel adapter ? |
| 20:06.25 | JMunakra | Parallel, and also RS232 direct |
| 20:06.43 | [g2] | is speed an issue at all ? |
| 20:06.43 | JMunakra | but the rs232 module isn't included yet |
| 20:07.13 | [g2] | there'd be a monitor program running with the RS232 local to the target under test |
| 20:07.32 | JMunakra | parallel it's decent, not as fast as the ARM parallel box tho |
| 20:07.33 | [g2] | kinda like serial or ethernet GDB |
| 20:07.44 | JMunakra | but it's not optimized very much |
| 20:08.02 | JMunakra | no, all the debug logic is on the host |
| 20:08.29 | JMunakra | the RS232 I was using had just the RS232 wires attached to the JTAG pins, through a level changer |
| 20:09.00 | [g2] | so the on-board debugging logic holds up the target processor and if the host takes awhile to respond it's patient |
| 20:09.13 | [g2] | it's just that x-fers between the host and target are slower |
| 20:09.14 | JMunakra | jamie: they should also rate the usability of each of them. |
| 20:09.21 | [g2] | like trying to dump 16MB of memory out |
| 20:09.40 | JMunakra | g2, yes |
| 20:10.01 | JMunakra | the ARM debug core is totally stable, no matter how slow you clock it :) |
| 20:10.21 | [g2] | JMunakra, ah... so you just use RX/TX and the hw flow lines for the jtag connections :) smart. |
| 20:10.50 | JMunakra | Right. |
| 20:11.07 | [g2] | "I love it when a plan comes together" :) |
| 20:11.23 | JMunakra | I use it with a USB to serial adapter tho, and that makes read operations REALLY slow since you have to wait for the USB, |
| 20:11.39 | JMunakra | Haven't tried with a "real" serial port. |
| 20:11.55 | jamie | I'm looking at the IXP420's GPIOs and thinking that several of the on-chip ones could be "repurposed" - LEDs and buttons. |
| 20:12.00 | [g2] | hmmm... is that a 1.1 adapter ? |
| 20:12.08 | JMunakra | g2, yes |
| 20:12.18 | JMunakra | 2.0 could be 8 times faster |
| 20:12.42 | [g2] | jamie, yes they could be |
| 20:12.53 | JMunakra | but it's not worth bothering, it will always be dead slow |
| 20:13.05 | JMunakra | I just didn't have an alternative on my powerbook |
| 20:13.23 | JMunakra | so I'm awaiting the USB stuff you're working on |
| 20:13.36 | [g2] | ep1220, is the man |
| 20:13.40 | jamie | Well, I don't know the chip well enough to know if it's realistic to do a clock in 26 instructions. It _is_ realistic on, say, an 8051 and some other ARM devices. |
| 20:13.42 | [g2] | he's got stuff running already |
| 20:15.35 | JMunakra | with FTDI? |
| 20:15.38 | [g2] | nod |
| 20:15.47 | [g2] | and with cypress and the S3 |
| 20:15.57 | [g2] | the USB portion anyway |
| 20:16.04 | JMunakra | What's that S3 thing? |
| 20:23.23 | [g2] | it's the Spartan 3 FPGA |
| 20:23.54 | [g2] | http://www.digilentinc.com/info/S3Board.cfm |
| 20:27.58 | JMunakra | oh yeah |
| 20:29.43 | jamie | ep1220 has the JTAG programming working with the S3? |
| 20:30.27 | [g2] | jamie, he has the USB 2.0 adapter working with the S3 board |
| 20:31.40 | jamie | As in, USB->FTDI->RS232, RS232->S3? |
| 20:31.43 | jamie | Ah. |
| 20:31.49 | [g2] | there site got re-org'd and isn't fully right... but look for usb2 on this page http://www.digilentinc.com/products/Accessory.cfm |
| 20:32.23 | [g2] | jamie, no.. usb 2.0... S3 FPGA -> Device under test (DUT) |
| 20:32.46 | jamie | I don't see a USB interface on the S3 dev board you mentioned... |
| 20:33.13 | [g2] | jamie, the link from 1 minute ago has the USB 2.0 adapter on the page |
| 20:33.18 | [g2] | it's $49 is |
| 20:33.20 | [g2] | ish |
| 20:34.10 | jamie | Yeah, I see where your leading. The link to the USB 2.0 adapter is broken. |
| 20:34.52 | [g2] | it's the cypress CY68C013 iirc |
| 20:35.01 | jamie | yes, it does say that much. |
| 20:35.18 | jamie | It's an EZUSB. Sound like the "accessory" could be quite useful by itself :) |
| 20:35.22 | [g2] | so ep1220 has reprogrammed that |
| 20:35.42 | [g2] | right at $49 it's no bad :) |
| 20:36.17 | [g2] | there's actually a newer dev kit too that as a 500K part, ethernet, and 16MB ram |
| 20:36.21 | jamie | Not bad at all... |
| 20:36.25 | [g2] | at $149 to |
| 20:36.28 | [g2] | at $149 too |
| 20:37.07 | jamie | An EZUSB should get you some nice JTAG programming optimisations; I forget how fast it is though, and it can't do the USB transfers at the same time as bit-banging. |
| 20:37.28 | jamie | (It's like IDE PIO in that respect) |
| 20:38.15 | [g2] | http://www.xilinx.com/products/spartan3e/s3eboards.htm |
| 20:38.28 | jamie | (Correction: it can, but some processing by the 8051 is required) |
| 20:39.22 | jamie | That has a "3-bit, 8-color VGA display port". You have your thin client!! :) |
| 20:39.47 | [g2] | the soft-core would be too slow |
| 20:39.54 | jamie | But yes, that kit looks like just the job for.... almost every job! |
| 20:41.14 | [g2] | well for a little over $100 I can buy a Soekris 4501 and plug a PCI VGA into is for < $150 is |
| 20:41.15 | jamie | Which soft-core are you referring to? |
| 20:41.16 | [g2] | well for a little over $100 I can buy a Soekris 4501 and plug a PCI VGA into is for < $150 ish |
| 20:41.34 | [g2] | but it'd be to slow :) |
| 20:41.57 | [g2] | I guess you're not aware of the micro-blaze stuff |
| 20:42.16 | jamie | A 500k gate Spartan-3e is fast enough for a lot of things. Yes, I have heard of the Microblaze, I looked into it for an MPEG decoding project. |
| 20:42.40 | jamie | There's a company using Microblaze Linux + their own MPEG-2/4 decoder on a Xilinx, to make a nice video player. |
| 20:42.41 | [g2] | they've been running uClinux on it for at least 8-9 months |
| 20:43.26 | [g2] | From what I've seen the Sigma chips are quite popular |
| 20:43.37 | jamie | I'm working on a Sigma chip job now. |
| 20:43.41 | [g2] | I've been looking for some device running Linux |
| 20:43.46 | jamie | They're not very good about giving out information :( |
| 20:43.49 | [g2] | because we'd reflash em |
| 20:44.07 | [g2] | I heard they had a Linux port |
| 20:44.12 | jamie | Do you want to buy some boards with Sigma chips on? I know someone who might sell them :) |
| 20:44.50 | jamie | Yes, they do. I think (but am not sure) that maybe they _only_ run Linux on their current chips. |
| 20:44.51 | [g2] | I think a Linux kit would make lots of sense |
| 20:45.01 | jamie | There are proprietary drivers for some of the video bits, though. |
| 20:45.37 | [g2] | Depending on the proprietary drivers there may be lots of ppl interested |
| 20:45.55 | jamie | Linux version 2.4.26-em86xx-uc0-sigma (s970404@sr2s2.kinposh.com.cn) (gcc version 2.95.3 20010315 (release)) #1 .» 4.. 11 13:40:51 CST 2005 |
| 20:46.02 | [g2] | IMHO the whole myth TV thing is technical wanking |
| 20:46.39 | [g2] | Somebody should be making a sigma design for like $250 that'd kick Myth-TV's ass |
| 20:46.42 | jamie | I'm on a job which was using a VIA-based PC, but we dropped it after deciding it was too expensive, and are now working out a custom board using the sigma chip. |
| 20:46.56 | [g2] | Nod. |
| 20:47.03 | [g2] | the C7 looks real interesting though |
| 20:47.39 | jamie | I think the VIA stuff is technically very good in general, but it's let down by their software support. |
| 20:48.33 | jamie | The poor folks over at unichrome.sf.net are producing video drivers for it, and they have no end of hassle. |
| 20:48.34 | [g2] | I've heard that the release the CN400 stuff |
| 20:48.36 | [g2] | lately |
| 20:48.48 | [g2] | It'll be interesting to see how things play out |
| 20:49.26 | [g2] | My take on the market is there following: |
| 20:49.29 | jamie | Yes. It's not the most stable stuff, but it can do HDTV and apparently is good at it when it works. (And the opensource stuff outperferms VIAs own code despite depending on reverse-engineering and a bad attitude from VIA) |
| 20:49.36 | [g2] | 1) <$150 US devices |
| 20:49.44 | [g2] | 2) 150-350 |
| 20:49.45 | jamie | In the end, though, we went with sigma because of power consumption too... |
| 20:49.58 | jamie | Price, and lack of a fan. Both good things. |
| 20:49.59 | [g2] | 3) 350-550 (mini-itx) |
| 20:50.02 | [g2] | 4) PCs |
| 20:50.05 | [g2] | 5) Custom |
| 20:50.08 | jamie | Depends on the mini-itx. Some are <$200. |
| 20:50.26 | [g2] | exactly |
| 20:50.40 | jamie | With sigma we've ended up with a board that's just about <$150, and I'm quite happy with the peripheral bits crammed onto the board. |
| 20:50.58 | [g2] | It's running Linux ? |
| 20:51.03 | jamie | yes |
| 20:51.38 | jamie | It's a bit dismaying to ask "can you run it in _this_ video mode please..." and get back a response from our SDK supplier saying "sorry, we don't have the manual for the chip and the driver from sigma has modes limited to the following table..." |
| 20:51.53 | jamie | So a mixed bag software development wise. |
| 20:52.32 | [g2] | this is where the open-source army would just reverse or figure out a bunch of stuff |
| 20:52.37 | jamie | But we have a very friendly supplier, and that's worth a million small problems. |
| 20:52.48 | jamie | Yes, maybe that will happen ;-) |
| 20:53.11 | dyoung-zzzz | hmm? |
| 20:53.19 | [g2] | morning sunshine :) |
| 20:53.20 | jamie | We tried to get a sigma dev kit... but their sales person in EU didn't answer any of our calls :( |
| 20:53.26 | dyoung-zzzz | someone said army and reverse engineer..... |
| 20:53.40 | [g2] | dyoung, say hi to Jacmet |
| 20:53.44 | [g2] | dyoung, say hi to jacques |
| 20:53.50 | [g2] | dyoung, say hi to jamie |
| 20:53.54 | [g2] | DOH! |
| 20:54.02 | [g2] | damn tab completion |
| 20:54.03 | dyoung | :-) |
| 20:54.10 | dyoung | Hi jamie. |
| 20:54.18 | jamie | so we're lucky to have found an intermediary who can get the chips and make the board. |
| 20:54.27 | jamie | Hi dyoung :) |
| 20:55.24 | [g2] | dyoung is one of the very early core dev's on the nslu2-linux project |
| 20:55.44 | jamie | pleased to meet you |
| 20:56.02 | [g2] | jamie is developing a sigma chip based media player, right ? |
| 20:56.12 | jamie | I'm an alien that g2 is trying to recruit for some poorly specified and underpaid task ;) |
| 20:56.14 | [g2] | we were talking OpenJTAG |
| 20:56.41 | dyoung | Cool! |
| 20:56.50 | jamie | that's right. |
| 20:56.52 | dyoung | I basically dont know what the hell I'm doing. |
| 20:56.52 | [g2] | ahh... but the the rewards from working code and first tracks are "priceless" :) |
| 20:57.28 | jamie | Well, g2, I'm happy for you to be my agent for speaking to the bank then :) |
| 20:57.30 | [g2] | dyoung, what's that quote ? "Beaten paths are for beaten men" ? |
| 20:57.57 | jamie | well, what landed my in this space was mentioning that I'd like to make opensource hw.... I really meant silicon, mind you. |
| 20:58.13 | dyoung | I'm all for opensource hardware. |
| 20:58.14 | jamie | Mainly because it's an unbeaten path that's positively desparate to be beaten... |
| 20:58.28 | jamie | sw is so 1990s. |
| 20:58.36 | dyoung | exactly! |
| 20:58.51 | jamie | besides, after the first 20 years coding, you start to want something a bit different ;) |
| 20:59.22 | dyoung | the future is in open hardware that can be synthesized on FPGA or Hard Silicon; IMHO. |
| 20:59.50 | jamie | I notice a lot of talk about this board and that board from various web sites... is nobody able to assemble own boards yet? |
| 21:00.32 | [g2] | jamie, my path is the following |
| 21:00.37 | jamie | dyoung: I agree very much, except that I'm not sure if we'll be making hard silicon first, or if some other tech will arrive which is better, such as the plastic electronics being prototyped or something else |
| 21:00.43 | [g2] | 1) re-work and dev kits |
| 21:00.50 | [g2] | 2) build custom boards |
| 21:00.56 | [g2] | 3) build custom chips |
| 21:01.03 | jamie | ah, a business plan :) |
| 21:01.15 | [g2] | I think the future is on the integration of the system |
| 21:01.16 | jamie | [g2] thanks for that, I feel a sense of communion with you now. |
| 21:01.33 | [g2] | I've got to execute on 1) first :) |
| 21:01.36 | jamie | I feel like I want to cut the crap and go to step 4) manufacture the chips ourselves |
| 21:02.06 | [g2] | last I checked that was a $1-2M deal to start with |
| 21:02.19 | jamie | clearly, step 4a is "find a cheaper way" |
| 21:03.03 | [g2] | I think dreaming is great and actually doing something is even better |
| 21:03.08 | jamie | yes, I agree. |
| 21:03.53 | [g2] | jamie do you do a lot of board layout ? |
| 21:04.22 | [g2] | and do you following the opencores stuff seriously ? |
| 21:04.26 | jamie | no, I've never done a board layout (though I've worked on large schematics, and left someone else to go insane doing the layout ;-) |
| 21:04.39 | dyoung | for (4a), I think we need some alien technology. |
| 21:04.44 | [g2] | jamie, I meant design, not PCB layout |
| 21:05.02 | jamie | So you mean schematics, yes? |
| 21:05.12 | jamie | No, I don't, but I have done. |
| 21:05.24 | jamie | some, not a lot. |
| 21:05.44 | [g2] | ok, thx! |
| 21:07.35 | jamie | dyoung: It sounds like a dream but I'm serious, and I think (4a) is crackable in the next 5 years. |
| 21:08.07 | jamie | if we decide to crack it... |
| 21:08.16 | dyoung | I find myself unable to predict future technologies anymore, so youre probably right. |
| 21:08.33 | dyoung | But dammit, I want my flying car. we were su pposed to have them my now! |
| 21:18.13 | jamie | dyoung: imho we need the political change that's accompanying open source more than we need the tech... |
| 23:37.23 | [g2] | jamie, are you around ? |
| 23:37.46 | jamie | yes |
| 23:38.15 | jamie | but not for much longer |
| 23:38.18 | [g2] | just one comment, I know a guy designing a chip right now |
| 23:38.35 | [g2] | so if you wait 5 years you might be 4 years too late |
| 23:38.41 | [g2] | and it's not me |
| 23:38.51 | [g2] | I'm doing the board thing now |
| 23:38.58 | [g2] | just FYI |
| 23:40.13 | [g2] | jamie, nice chatting hope to see you around :) |
| 23:40.35 | jamie | Hmm. I know quite a few chips get designed and fabbed through academic connections (on small qtys), that there's folks designing a 3d graphics core to be fabbed and sold.. are you referring to one of the publicised projects? |
| 23:41.06 | [g2] | no |
| 23:41.22 | jamie | ok, you'll have to fill me in on the mystery sometime... |
| 23:41.29 | jamie | cheerio! |
| 23:41.34 | [g2] | cheers |
| 23:42.45 | jamie | (btw i'd be _very_ keen to do a chip design myself if I knew a way to get it fabbed..., should you have any ideas or info in that direction) |
| 23:43.20 | [g2] | I don't. I wanted to do some SOC and I couldn't figure out how to get it done |
| 23:43.21 | [g2] | :( |
| 23:43.57 | jamie | Right now, small scale SOC is best done with FPGAs. But it's not cheap for a big S. |