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00:59.36 | [g2] | dyoung, ping |
06:37.50 | *** join/#openjtag ka6sox (~ka6sox@adsl-66-159-198-116.dslextreme.com) |
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17:10.16 | *** join/#openjtag ka6sox-office (~tking@netblock-66-159-209-52.dslextreme.com) |
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18:23.50 | ka6sox-office | hiya ep1220 |
18:24.08 | ka6sox-office | finally have a few minutes to work on the boards again today |
18:28.44 | ep1220 | hello ka6sox-away |
18:30.08 | ep1220 | So we might see a schematic soon ? |
18:33.41 | ka6sox-office | I've got it up in another window now. |
18:34.29 | ep1220 | How happy are You with the GEDA tools ? |
18:34.52 | ka6sox-office | for the projects that I've been doing they are okay |
18:35.31 | ep1220 | So far i only have installed them. |
18:36.07 | ka6sox-office | PCB has a few stupid limitations but they may have been a necessity earlier. |
18:37.01 | ep1220 | Is the circuit finished ? Or still open ends ? |
18:38.09 | ka6sox-office | design is finished but I'm taking a slightly different tack. |
18:38.23 | ka6sox-office | no CPLD, just an OC chip |
18:38.33 | ka6sox-office | (a real one) |
18:39.33 | ep1220 | And input connected directly to the 2232C ? |
18:41.37 | ka6sox-office | yeah. |
18:41.45 | ka6sox-office | although that might be a problem. |
18:41.57 | ka6sox-office | (getting out my 2232 book. |
18:42.11 | ep1220 | Can the 2232 do 5V when powered on 3.3 ? |
18:50.44 | ep1220 | datasheet requires VIn < VCC+0.5V |
18:51.14 | ka6sox-office | I'll just use the OC to do the conversion the other way too. |
18:52.50 | ep1220 | In this case: the OC might see different Hi Level on JTAG and FTDI side. |
18:55.09 | ep1220 | Which OC have you selected ? |
18:57.41 | dyoung | wait. |
18:57.54 | dyoung | why not just use a OC with a core voltage of 3.3V ? |
18:58.07 | ka6sox-office | that is what I was looking at. |
18:58.25 | dyoung | as long as whatever that device is can handle 5V in. |
18:58.30 | ka6sox-office | gotta go offline..my help for a project has arrived. |
18:59.54 | ep1220 | dyoung: How important is <3.3V to you ? |
19:00.09 | ep1220 | On the JTAG side I mean. |
19:10.23 | dyoung | It would mean being able to use it with the new generation of stuff or not. I suppose its not *that* important. |
19:10.32 | dyoung | but definitely a nice feature. |
19:12.28 | ep1220 | 3.3 to 5 only would be easier. |
19:12.46 | ep1220 | However we can check-out the OC way. |
19:14.33 | ep1220 | I'll wait till ka6sox-office tells us which OC chip he plans to use. |
19:15.40 | ep1220 | worst case might have to use one for JTAG->FTDI and one for FTDI->JTAG |
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