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| 06:52.01 | *** join/#openjtag JMunakra (~JMunakra@dsl-084-059-196-022.arcor-ip.net) |
| 06:54.09 | JMunakra | re |
| 06:59.26 | ka6sox | hi |
| 06:59.57 | ka6sox | what area are you working on? |
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| 07:09.38 | ka6sox | Hi jacques! long time no talk to! |
| 07:11.38 | jacques | yeah, I'm finally home |
| 07:14.02 | JMunakra | Hey, sorry, no time right now. I'll be back in an hour, hope we can talk then. |
| 07:14.11 | ka6sox | me too! |
| 08:30.43 | ka6sox | jacques, everybody all moved? |
| 08:52.14 | JMunakra | ka6sox.... |
| 08:52.20 | ka6sox | hi there. |
| 08:53.20 | JMunakra | So what I'm working on is a generic JTAG library that lets you move the TAP state machine and shift bits in and out, with a cable driver plugin interface. |
| 08:53.49 | ka6sox | cable from serial/usb/parallel? |
| 08:53.58 | JMunakra | Plus, there's a gdb stub interface, and debugger stub code for ARM7TDMI and MIPS. |
| 08:54.30 | JMunakra | Right now, there are drivers for parallel and serial cables. |
| 08:54.47 | ka6sox | cool...we are looking at Xscale as this is adjunct to the NSLU2-Linux project. |
| 08:55.11 | JMunakra | But it's not a big deal making drivers, they don't have so much to do. Most ist abstracted in the JTAG base lib. |
| 08:55.44 | ka6sox | is there a group doing this or just you? |
| 08:56.07 | JMunakra | This is from a project called MITOUJTAG. Ever heard of it? |
| 08:56.29 | ka6sox | no...do you have a url? |
| 08:57.34 | JMunakra | Point is, the guy who started it, published a very early version under GPL, then abandoned it for commercial licenses and closed source. I've just picked up on the code, bringing it in shape for a release. |
| 08:58.24 | ka6sox | ah...no money in GPL for him....just couldnt' see the model |
| 08:59.29 | JMunakra | I needn't care about the money, Got some free time to work on it, and open source needs it. Do you do consulting based on it or plan to? |
| 09:01.17 | ka6sox | I am a hardware guy who uses the BDI2000 unit and can't afford one for home. |
| 09:01.47 | ka6sox | I would like to recreate something similar(but not maybe as feature rich) for use with gdb |
| 09:01.57 | ka6sox | (a pod hardware device) |
| 09:02.33 | ka6sox | and make it affordable for OpenSource embedded developers to be able to get boards going. |
| 09:03.02 | JMunakra | Actually, that's just what I was planning to do |
| 09:03.47 | JMunakra | So what kind of JTAG converter/cable do you envision? |
| 09:04.28 | ka6sox | I was looking at using Xilinx S3 board but now I'm thinking about using a S3e board instead because it will have interfaces and memory |
| 09:04.50 | JMunakra | Don't you think that's rather expensive? |
| 09:05.01 | ka6sox | $149 |
| 09:05.07 | ka6sox | (US) |
| 09:05.30 | ka6sox | a BDI2000 is over $2000/arch |
| 09:06.08 | JMunakra | What functionality do you have in your current code? |
| 09:06.31 | ka6sox | basic programming is all I've been working on. |
| 09:06.46 | JMunakra | Data uploading? |
| 09:06.49 | ka6sox | (been a little distracted with work stuffs) |
| 09:06.50 | ka6sox | yeah |
| 09:07.08 | JMunakra | directly to Flash/RAM? Or via the processor? |
| 09:07.26 | JMunakra | Extest/Intest, that is? |
| 09:07.43 | ka6sox | I"ve been playing with the flash algorithms for StrataFlash |
| 09:08.11 | ka6sox | (making the Processor lines wiggle) |
| 09:08.38 | ka6sox | but I havent' uploaded that as I could brick a device if I get it wrong |
| 09:08.50 | ka6sox | (my code is written in VHDL) |
| 09:09.15 | JMunakra | Why do you use VHDL? |
| 09:10.48 | ka6sox | because that is what the Xilinx S3 board is programmed in. |
| 09:11.21 | JMunakra | WebKit does support Verilog, doesn't it? |
| 09:11.34 | ka6sox | yes |
| 09:11.52 | ka6sox | but the preferred language is VHDL for Xilinx parts. |
| 09:12.01 | JMunakra | I see |
| 09:12.05 | ka6sox | (according to the manufacturer. |
| 09:12.18 | ka6sox | I think that Verilog is somewhat easier to program in. |
| 09:12.50 | JMunakra | So what functionality do you envision for your device? In addition to programming a flash? |
| 09:16.03 | ka6sox | memory mapping |
| 09:16.08 | ka6sox | breakpoints |
| 09:16.21 | ka6sox | gdb support |
| 09:16.42 | JMunakra | sounds good |
| 09:16.54 | ka6sox | boundry Scanning |
| 09:16.59 | JMunakra | what do you mean with memory mapping? |
| 09:17.33 | ka6sox | when a processor fails I want to be able to see the state of memory and download chunks of it for analysis. |
| 09:17.45 | ka6sox | (process that is) |
| 09:17.53 | JMunakra | oh, memory dumping |
| 09:17.58 | ka6sox | mostly for kernel/driver debug) |
| 09:18.44 | JMunakra | where are you from? |
| 09:18.51 | ka6sox | Californai |
| 09:18.55 | ka6sox | ia |
| 09:19.27 | ka6sox | cool. |
| 09:19.34 | JMunakra | and who do you work for? |
| 09:19.42 | ka6sox | myself. |
| 09:19.58 | JMunakra | student? |
| 09:20.14 | ka6sox | oh no...that was 25yrs ago... |
| 09:20.19 | JMunakra | :) |
| 09:20.27 | JMunakra | What's your product? |
| 09:20.42 | ka6sox | my "day" job is actually in Analog Hi Power RF. |
| 09:21.02 | JMunakra | hm, nice |
| 09:21.49 | ka6sox | 100watts to 105kilowatts |
| 09:23.03 | ka6sox | I dabble in Supervisory,Control and Data Aquisition stuff too (well actually a lot more than dabble) |
| 09:23.07 | ka6sox | what do you do there? |
| 09:29.22 | JMunakra | Embedded Software |
| 09:30.15 | JMunakra | So, I'm going to publish my code shortly, so you can have a look at it, and see whether it'd help you |
| 09:31.04 | JMunakra | The good thing about it is the modularity, people can easily add a module (for processor/cable/whatever) and need not care about the other parts |
| 09:31.50 | JMunakra | So if I write an Xscale debugger, I don't need to care about the cable/interface, I can just shift bits in and out the TAP controller. That's quite nice. |
| 09:32.24 | JMunakra | OTOH, if I build a new, super fast cable, all the existing debuggers/software will be able to use it instantly |
| 09:32.28 | ka6sox | as long as you have the bsdl file you are good to go. |
| 09:33.55 | JMunakra | How many people are actively developing on your project? |
| 09:39.40 | ka6sox | 2 or 3 |
| 09:40.48 | ka6sox | its actually 2:41am here and I realized I have a client meeting in a little more than 5hrs...so I had better get some sleep. |
| 09:41.02 | ka6sox | but I hang here most of the time. |
| 09:41.18 | ka6sox | and would like to continue this discussion. |
| 09:41.39 | JMunakra | sure |
| 09:41.53 | JMunakra | I'll be here |
| 09:42.38 | ka6sox | all right..cya soon. |
| 09:42.49 | JMunakra | bye |
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