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| 04:15.52 | MonMotha | well, I guess I need to set up a buildroot... |
| 04:16.14 | MonMotha | just got the SBC I need to run this system on, and it appears that the Elan is a 486, not a 586 like I was told |
| 04:16.28 | MonMotha | which SUCKS becuase this whole damn thing is compiled with -march=i586 |
| 04:16.44 | jacques | d'oh |
| 04:16.48 | MonMotha | yeah |
| 04:17.00 | MonMotha | I manged to at least get the kernel to boot and give status |
| 04:17.11 | MonMotha | that took forever (had to tell it to run at 115200 baud...doh) |
| 04:20.25 | TomW | yup, Elan is a glorified 386 |
| 04:21.18 | MonMotha | does gcc know it, or should I just use i386 (I was told to use 486) |
| 04:21.35 | MonMotha | TomW: oh, btw..you do openhardware.net, right? |
| 04:21.44 | TomW | yes |
| 04:21.58 | MonMotha | you don't happen to have a good reference on DRAM, do you? |
| 04:22.09 | MonMotha | I saw the EZLCD's DRAM controller and started wondering |
| 04:22.11 | TomW | badly... I haven't spent much time with the content lately. :/ |
| 04:22.23 | MonMotha | heh |
| 04:23.14 | TomW | I used one of the Micron data sheets to do the DRAM stuff with, I had designed with DRAM many years ago, so the datasheet only was to get some of the timing particulars. |
| 04:23.46 | TomW | MonMotha: what in particular do you feel challenged by with DRAM? |
| 04:23.59 | MonMotha | ah...see I know the very basic principles, but would just like to see a nice reference |
| 04:24.06 | MonMotha | just interfacing it |
| 04:24.21 | MonMotha | I haven't even seen a single waveform in terms of how to talk to the stuff |
| 04:25.18 | TomW | Only thing I would warn you about is the Lower / upper CAS line on the 16 bit DRAM, they each control a byte from the DRAM and if you mix them up, you are in trouble. |
| 04:25.51 | TomW | MonMotha: AH, the waveforms. Yeah, get one of the DRAM datasheets from Micron, or, I can DCC one I have. |
| 04:26.15 | MonMotha | TomW: go ahead and try and DCC it if it's convenient |
| 04:26.22 | MonMotha | my DCC receives should work |
| 04:26.30 | MonMotha | I just can't send unless the other guy is on IPv6 :) |
| 04:26.51 | TomW | Generally, you don't have to worry much about the waveforms, unless you are sequencing the DRAM with your own logic: for example, adding DRAM to an 8051 / 68HC11 controller. |
| 04:27.34 | MonMotha | well, it's kinda off in the future, but that's probably what I'll need to do |
| 04:27.42 | MonMotha | the thing I'm using certainly won't have it's own DRAM controller |
| 04:28.09 | TomW | DRAM is very very easy to sequence yourself, all you need is a shift register and a 20MHz clock source, and some octal buffers to feed the column & row addresses into the DRAM address lines. |
| 04:29.00 | TomW | let me think, do I have a schematic laying around where I did the shift register sequencer. |
| 04:29.19 | MonMotha | TomW: I saw the EZLCD had one |
| 04:29.21 | TomW | first the datasheet. |
| 04:30.35 | MonMotha | yup, that worked |
| 04:30.35 | MonMotha | thx |
| 04:30.48 | TomW | that has some nice waveforms in it. |
| 04:31.28 | MonMotha | thx |
| 04:32.03 | TomW | basically, you do: setup the Lower Address to the DRAM, set RAS active, setup the upper address to the DRAM, setup your Read / Write signal onto the DRAM, then finally activate CAS. |
| 04:32.29 | MonMotha | sounds simple enough |
| 04:32.48 | TomW | RAS is used to operate the internal latches of the DRAM to grab the address pair (column & row), then CAS initiates the operation. |
| 04:33.38 | MonMotha | makes sense |
| 04:34.04 | MonMotha | what about refreshing? |
| 04:34.43 | TomW | you have to observe the setup times, for example, you have to let the address lines stabilize at the DRAM (propogate throught the octal buffer chips), then, the address line data has to sit on the inputs of the DRAM for a few milliseconds until it propogates internally to reach the DRAM internal latches, once you have done the prop times, then you can assert RAS. |
| 04:34.50 | chouimat|Zzzz | night |
| 04:35.28 | MonMotha | TomW: fairly normal...just a few more things to consider than accessing, say, normal SRAM or reading ROM |
| 04:35.40 | MonMotha | I'm usually fairly conservative with my timings anyway |
| 04:35.48 | TomW | MonMotha: if you want to refresh DRAM on say, an 8051 system, simply use the 8051 internal timer to generate a periodic interrupt and have the ISR do a read of 256 contigious memory locations. |
| 04:35.52 | MonMotha | though I'm trying to get away frmo that so that the performance of my systems doesn't suck :) |
| 04:37.10 | TomW | DRAM timing is very fast, faster than most 8 bit controller access cycles, you can achieve a DRAM read / write cycle easily within 60..70ns, most 8 bit controllers use a 100ns RAM access cycle. |
| 04:38.07 | MonMotha | TomW: well, my eventual goal is an i960 based system, but I'm attempting to work up to that |
| 04:38.40 | MonMotha | currently I'm working on an 80451, but it's an ancient part that only has 64kbyte address space available anyawy, so I aws just gunna slap some SRAM on it |
| 04:38.49 | MonMotha | next I was going to do a z80 tho |
| 04:39.04 | Russ | 60ns to 70ns |
| 04:39.06 | Russ | hahahaha |
| 04:39.11 | Russ | too f'ing slow |
| 04:39.30 | Russ | working on the impedence matching and such for the 133MHz stuff in my design |
| 04:39.30 | MonMotha | true |
| 04:39.31 | TomW | with a 30MHz clock driving the shift register, you can do: RAS, MUX, CAS in about 96ns. |
| 04:39.33 | MonMotha | they are pretty slow |
| 04:39.55 | Russ | data sheets don't seem to show driver impedance and whatnot though |
| 04:40.06 | MonMotha | oh, I thought you were talking about the z80s :) |
| 04:40.10 | MonMotha | (and yes, they are pretty slow :) |
| 04:40.22 | Russ | and it looks like the part that is driving my clock seems to have a 1.8ns rise time, and 1.5ns fall time... |
| 04:40.30 | Russ | which seems a bit long for a 7.5ns cycle |
| 04:40.33 | TomW | MonMotha: I have that processor in one of my designs. Interesting thing is that Phillips used to have an AppNote about building a Print Spooler that used DRAM on the 80451. |
| 04:41.16 | Russ | using an 8051 in that design too |
| 04:41.21 | Russ | little less worried about that |
| 04:41.32 | Russ | especially given it has onboard ram/flash |
| 04:41.36 | Russ | buck a pop |
| 04:41.55 | MonMotha | TomW: heh, I picked this sucker up with all the documentation for like $8 at the local parts store |
| 04:41.58 | MonMotha | figured I could tinker with it |
| 04:42.10 | MonMotha | it's pretty ancient (last date I can find on anythign is 1988), 64 pin DIP :) |
| 04:42.16 | MonMotha | I had a hell of a tiem just finding a socket for the thign :) |
| 04:43.31 | TomW | MonMotha: I do think that I have about 20, or so, of those chips here. |
| 04:43.51 | TomW | MonMotha: mine are the 68pin PLCC |
| 04:43.59 | MonMotha | yeah |
| 04:44.10 | MonMotha | advantage of those is taht port 4 (I think that's the one) is 8 bits, rather than 4 |
| 04:44.16 | MonMotha | if the extra 4 IO lines are useful for you :) |
| 04:44.22 | MonMotha | (that and they're smaller) |
| 04:44.27 | TomW | the 64 pin package chopped off the AFlag & BFlag handshake of Port 6. |
| 04:44.38 | TomW | IIRC |
| 04:44.55 | MonMotha | nope, I still have those |
| 04:45.00 | TomW | ok |
| 04:45.04 | MonMotha | it chops off the upper 4 bits of port 4 |
| 04:45.10 | TomW | k |
| 04:45.15 | TomW | been a while |
| 04:45.41 | MonMotha | yeah |
| 04:45.44 | MonMotha | I can believe that |
| 04:45.50 | MonMotha | huge DIP packages went out a while ago :) |
| 04:47.25 | TomW | basically, when you do the DRAM shift register controller, you hold the shift register in RESET while the DRAM is not being accessed. When the DRAM becomes chip selected, you release the RESET and it starts shifting one's across it's outputs. You take the first output to drive the RAS, the next drives the Mux (octal buffers feeding the upper / lower address lines to the DRAM inputs), and the next output feeds the CAS. |
| 04:48.30 | TomW | tie your processor R/W signal directly to the DRAM read / write pins. Then use the processor R/W signal to gate the OE (output enable) of the DRAM data onto the processor's data bus. |
| 04:48.44 | MonMotha | yeah, I'm using a similar thing to run across the octets on my EPP interfaced flash programmer (supports 16 bit data bus) |
| 04:49.45 | TomW | MonMotha: http://www.openhardware.net/doodles/terminal.php |
| 04:50.33 | TomW | MonMotha: look at IC2, it is the shift register driving the DRAM. I was doodling with 4Meg DRAMs on that design. |
| 04:50.58 | MonMotha | TomW: yep, that's what I was on your site looking at before |
| 04:51.12 | TomW | IC2 is a four bit synchronis latch, wired as a shift register. |
| 04:52.04 | MonMotha | TomW: heh, I'm actually using that exact chip on my flash programmer, in a similar manner |
| 04:52.15 | MonMotha | (well, it's an LS, but same function) |
| 04:52.26 | MonMotha | it's that simple tho? |
| 04:52.29 | TomW | I have done it using an 8 bit shift register (74165?), but, I needed active low & active high states of each shift to enable / disable different portions of that boards logic. |
| 04:52.35 | TomW | MonMotha: yup |
| 04:52.37 | TomW | simple |
| 04:52.41 | MonMotha | wow |
| 04:53.11 | MonMotha | the PC people must have some reason to make people think that talking to DRAM is some black art :) |
| 04:53.35 | TomW | timing is critical, just watch your data sheets to calculate the prop times (input to output prop from output enable) of the gates involved so that you satisfy the DRAM signal setup times. |
| 04:53.43 | TomW | other than that, it is a simple interface. |
| 04:54.11 | MonMotha | yeah |
| 04:54.11 | MonMotha | neat |
| 04:54.18 | TomW | BTW, SDRAM is also very simple, very very fast, but you can do the same as the DRAM controller for SDRAM by using a PLD. |
| 04:54.45 | MonMotha | really... |
| 04:55.30 | TomW | the SDRAM differs from the DRAM (basically) in that it uses a command word to dictate the operation (read, write, refresh, nop, ...). What they did was to simply streamline the RAS / CAS idea in to a command oriented interface. |
| 04:55.48 | TomW | same silicon, slightly different electrical interface. |
| 04:56.22 | MonMotha | ah, that would explain the almost nessecity of a PLD |
| 04:56.40 | TomW | Go to micron's site, they have an AppNote that discusses how to transition a DRAM based design over to use SDRAM. |
| 04:56.41 | MonMotha | it also needs the system clock, right? |
| 04:56.46 | MonMotha | k |
| 04:58.20 | TomW | MonMotha: at higher system speeds, you generally use a clock that is driving / derived from the processor's clock. This is so that you don't get in to the position where the two clocks are running asynchronisly with respect to each other. With asynchronis clocks, you have to consider that they might be 180 degrees out of phase. |
| 04:59.28 | TomW | By deriving the (S)DRAM clock from the processor clock source, you only have to worry about a few degrees of phase shift between the clocks (a few ps of difference). |
| 04:59.30 | MonMotha | yeah |
| 04:59.54 | MonMotha | I generally try to get by with only one clock anyway |
| 04:59.59 | MonMotha | one clocks ource that is |
| 05:01.20 | TomW | As to the "impedance matching" you see on the SDRAMs layout. That serves two purposes: cut down on overshoot / undershoot / noise on the various signals. BUT, it basically ensures that the signals will propogate across the PCB traces and arrive that the SDRAM input pins at the correct timing interval. |
| 05:01.44 | MonMotha | makes sense |
| 05:03.10 | TomW | Think about it, if you have the address line(s) longer than the RAS trace, the address signal(s) would be delayed and arrive later than the RAS (if both were asserted simultaneously). The "need for speed" is so great on the P-III & P-IV processor designs that the few picoseconds of delay is what they are trying to avoid. |
| 05:04.37 | MonMotha | oh yeah...I've actually had problems that may be related to that (difficult to tell without a scope) when hand wiring things - I just grab whatever wire is handy when I'm in a hurry, if that wire is 10 feet long, whatever :) |
| 05:04.48 | MonMotha | thing is, at the slow speeds I'm running, it's probably something else |
| 05:04.56 | MonMotha | (just a couple MHz usually) |
| 05:04.57 | TomW | of course, it is not a simple as measuring the length of the trace, it depends on the impedance that the trace presents: L == inductance == length and C == capacitance == input / output capacitance of SDRAM & drivers == etc.. |
| 05:05.11 | MonMotha | yeah |
| 05:05.24 | MonMotha | presumably I'll actually learn all this in the coming couple of years (starting EE curriculum) |
| 05:05.48 | TomW | having a high speed storage scope is an asset when troubleshooting (S)DRAM logic. |
| 05:06.12 | MonMotha | yeah...they're expensive tho |
| 05:06.19 | MonMotha | and I figured I should probably get a decent meter first |
| 05:06.20 | TomW | nice to have an appreciation of the potential problems so that you can interrogate the professor, eh? |
| 05:06.41 | MonMotha | TomW: most certainly...my objective is to have a working "computer" based on this 80451 when I walk in |
| 05:07.06 | TomW | Just to see if the guy knows what he is talking about, I mean "those that can, do; those that can't, teach". ;) |
| 05:07.17 | MonMotha | TomW: I should hope the guys knows what he's talking about |
| 05:07.23 | TomW | heh |
| 05:07.27 | MonMotha | paying through the nose for it |
| 05:07.31 | MonMotha | www.rose-hulman.edu |
| 05:07.34 | TomW | yeah |
| 05:08.08 | MonMotha | (no doubt it very prominantely mentions it's #1 US News & World Report rating...each time after which they promptly raised tuition :) |
| 05:08.59 | TomW | Well, it is good, IMO, to have an appreciation for the principles of the design process. Some people may question the usefullness of adding DRAM to an 8051 based processor, but, it presents practical challenges that require solutions. |
| 05:10.04 | MonMotha | yeah, certainly much more difficult than slapping some SRAM on there (which a 74138 is almost designed to glue a 8051 to SRAM and similar devices), but still simple enough that one can figure out what goes wrong! |
| 05:10.52 | TomW | you can pretty much teach anyone to write software. But, it is rare to find someone willing to sit still and work their way through the details of interfacing hardware. |
| 05:11.24 | MonMotha | (which is odd, I'm too lazy to sit down and actually learn how to program; I know C, but I swear I woudl take all day to write a simple bubble sort) |
| 05:11.27 | TomW | lots of people just want it to work: here, plug this in this way... |
| 05:11.40 | TomW | lol |
| 05:12.05 | MonMotha | yeah, I know the language but not the science |
| 05:12.18 | TomW | I enjoy doing both, I like the challange of creating a new design, then enjoy the process of crafting the software. |
| 05:12.47 | TomW | It's a living (obsession). |
| 05:12.48 | MonMotha | yeah, that's kinda what I'm doing |
| 05:13.20 | MonMotha | obviously as a learning experience...who in their right mind would want a calculator/clock in an enclosure the size of a smart box (it actually *IS* an old telco smartbox) |
| 05:14.31 | TomW | I gotta get back to work, I have some code that is fscking up big-time! I fed it a series of inputs and it behaved badly, fortunately, I had written some diagnostic logging into the software. So, it is time to do a post-mortem. |
| 05:14.49 | MonMotha | yep |
| 05:14.56 | MonMotha | where do you work btw? |
| 05:18.17 | TomW`work | MonMotha: I am a consultant, I work from home. |
| 05:19.09 | TomW`work | I get to smoke cigars and wander into the kitchen while I am working. |
| 05:19.48 | MonMotha | heh |
| 05:19.51 | MonMotha | works |
| 06:17.31 | Russ | TomW`work: so you know a bit about impedance matching? |
| 06:17.47 | TomW`work | from work with RF |
| 06:18.17 | TomW`work | transmission lines, input stages of amplifiers, etc. |
| 06:18.55 | TomW`work | RF == magic |
| 06:19.59 | Russ | ok, I think the best termination for most of my stuff is serial |
| 06:20.23 | Russ | so you take the impedance of the line, subtract the impedance of the transmitter, and use that value (or slightly lower) |
| 06:20.46 | Russ | I can't find in any of these datasheets the impedance of the transmitter |
| 06:20.58 | sorphin | heh |
| 06:20.59 | Russ | (largely going off of philips an246 |
| 06:21.32 | TomW`work | impedance is calculated, not stated. |
| 06:21.44 | TomW`work | resistance != impedance |
| 06:22.15 | Russ | ok, so how do I find the impedance of a fet based transmitter |
| 06:22.43 | sorphin | TomW`work: it'd be nice/simpler if it did tho ;) |
| 06:22.51 | TomW`work | Xl == 2 * Pi * L * F(MHz) |
| 06:23.11 | TomW`work | sorphin: you know this stuff, it is in the Technician license test. |
| 06:23.14 | Russ | X1 and L? |
| 06:23.26 | Russ | also, is MHz in rise time rate, or cycle time |
| 06:23.28 | TomW`work | ell |
| 06:23.37 | TomW`work | correct |
| 06:23.59 | TomW`work | slewrate approx equal to F in MHz. |
| 06:24.17 | sorphin | TomW`work: heh, you know how long it's been since i took the test? :P |
| 06:24.33 | jacques_gone | which test? |
| 06:24.33 | TomW`work | sorphin: prolly longer than you were last on the air? |
| 06:24.34 | Russ | why do they use slew in two different contexts like that? |
| 06:24.39 | TomW`work | jacques_gone: ham |
| 06:24.44 | jacques_gone | that wasnt on my test |
| 06:24.47 | jacques_gone | :-D |
| 06:24.56 | sorphin | TomW`work: something like that ;) |
| 06:24.59 | Russ | like the slew between two gates, or the slew as in tR and tF |
| 06:25.06 | sorphin | jacques_gone: yeah, wasn't on mine either |
| 06:25.16 | TomW`work | Frequency refers to a cyclical rate, slew is a rate of change. |
| 06:27.47 | Russ | so, what is X1 and L? |
| 06:28.42 | sorphin | Xl, not X1 |
| 06:29.01 | sorphin | and L is inductance |
| 06:30.40 | Russ | which inductance |
| 06:32.48 | sorphin | i'd assume the line/coil/whatever |
| 06:35.32 | Russ | I'm also wavering on whether or not I need termination |
| 06:36.54 | Russ | course, I suppose if I don't need it, but I use it anyway, I'm losing less that an ns...but that could be a lot |
| 06:39.21 | Russ | oi |
| 06:39.30 | Russ | I'm waiting for howard johnsons book to get here |
| 06:40.24 | TomW`work | Russ: what are you trying to terminate and why do you think that termination is necessary? |
| 06:40.37 | Russ | its pretty complex |
| 06:40.49 | Russ | I have 4 8-bit 133MHz SDRAMs on a 32bit bus |
| 06:40.58 | TomW`work | k |
| 06:41.00 | Russ | so the clock, address, control lines run to each of them |
| 06:41.24 | TomW`work | k |
| 06:41.34 | Russ | on the same bus I have various slow speed devices like flash, and buffers, unsure if I'll put that before, or beyond the SDRAM yet |
| 06:41.48 | Russ | then I have a host processor that hooks into that |
| 06:42.09 | TomW`work | IMO, I don't think that is a good idea. |
| 06:42.27 | Russ | then I have the digital output of a video processor that can take over control of the data bus via some flip-flops (delaying the pixel data one clock cycle is necessary) |
| 06:42.57 | Russ | so I figure 2-3 inches of heavily loaded lines |
| 06:43.04 | Russ | runing at up to 133MHz |
| 06:43.18 | Russ | with short margins |
| 06:43.37 | Russ | oh, and, the video chip may be powered on/off/reset |
| 06:44.05 | Russ | I'll share a ground, but not a vcc |
| 06:44.07 | TomW`work | yeah, but, you have all those input capacitances of the "slow speed" devices on the bus as well. Those capacitances are going to present themselves as a reactive resistance to the changing signal (AC load impedance). |
| 06:44.33 | Russ | it'll stay under 50pF |
| 06:45.21 | TomW`work | basically, Capacitive Reactance is: Xc == sqrt(2 * Pi * C * F), where C is in microfarads & F is in MHz. |
| 06:45.54 | Russ | unfortunately, at the present time, the most stressed signal is CLK during video bursting (video chip output buffer 11pF, three flip flops 5pF each, 4 SDRAMs 3.5pF each |
| 06:46.12 | Russ | so thats 40pF |
| 06:46.30 | Russ | when the host has control, some CBTLV stuff switches things around and there is 18pF load |
| 06:46.42 | TomW`work | I have not worked with SDRAM above 66MHz. The reactances of the PCB itself come into play at 100MHz and above. Most PCBs using high speed SDRAM are built (designed) using Spice emulation. |
| 06:48.16 | TomW`work | At the higher speeds, you have to envision the PCB trace as a sort of Transmission Line as opposed to a wire. The trace itself presents an inductance an that inductance becomes significant at higher speeds. |
| 06:49.02 | TomW`work | In one of Kirchoff's Laws: Maximum power is transfered when the source is equal to the load. |
| 06:49.14 | Russ | I know, which is where I'm talking about the series termination |
| 06:49.36 | TomW`work | In RF work, generally, max power gets transfered when the source, transmission line, and load are matched. |
| 06:49.47 | Russ | hmm...if I put the low speed stuff in the middle, and the SDRAM at the end |
| 06:49.58 | Russ | the serial termination wouldn't slow me down |
| 06:50.34 | TomW`work | Russ: what about using buffering logic and isolate the high speed & low speed buss? |
| 06:50.41 | Russ | in digital work, there is one transition, and you want that transition to not reflect the way you don't want it to reflect |
| 06:50.53 | Russ | TomW`work: the buffers have to go somewhere |
| 06:51.08 | Russ | the series termination relies on the reflection |
| 06:51.25 | TomW`work | put the SDRAM connected directly to the processor pins, then buffer those signals with drivers and take the output of the drivers to drive the low speed (high capacitance) logic? |
| 06:51.27 | Russ | the incident wave is divided in half by the series terminator at the transmittion source |
| 06:51.34 | Russ | the reflected wave makes up the other end |
| 06:51.38 | Russ | er, other half |
| 06:52.15 | Russ | TomW`work: the data bus only has 4 things hooked to each line |
| 06:52.40 | Russ | I staggered the low speed stuff since it was 8 bit, 8 bit, and 16 bit |
| 06:52.49 | Russ | it'll make it more difficult in software, but eh |
| 06:52.54 | TomW`work | Russ: ... with 7" of trace length overall? |
| 06:52.56 | Russ | the address bus does have a buffer |
| 06:53.08 | Russ | 7"? |
| 06:54.02 | Russ | all the reference designs I have terminate control lines, but not data/address lines |
| 06:54.11 | TomW`work | just a number, my point is that "only 4 things hooked to each line" is not the main issue, it is the line (wire) itself, and what capacitances & inductance is on that wire. |
| 06:55.01 | Russ | I'm thinking videochip(bga)<->processor(bga)<->flash(bga)<->buffers<->SDRAM |
| 06:55.56 | TomW`work | Russ: right, that is because when you look at the timing sheets, you will usually see that the Address & Data setup times are enough so that you would expect the signals tp propogate over the "wire", _then_ the control signal activates later. IMO, the balancing of the control signal timings is more critical. |
| 06:56.14 | Russ | right, I see |
| 06:56.20 | TomW`work | Address & Data setup leads the activation of the control signals. |
| 06:56.37 | Russ | should I make any attempt to make the impedence on the data/address lines higher than the control lines? |
| 06:56.52 | TomW`work | Timing between, say, the command word issuance and the clock edge are much tighter (speed). |
| 06:57.46 | TomW`work | Russ: I have seen the term "trace length matching" used when referring to laying out SDRAM traces. |
| 06:57.53 | Russ | I'm considering using bga buffers to keep stuff shorter |
| 06:58.08 | Russ | it apears that for the processor, rise time is 1.8ns on clock, and 1.5ns, I don't think thats right though |
| 06:58.53 | TomW`work | well, you're not going to end up with a square wave on the clock, it will be a somewhat distorted waveform. |
| 06:59.06 | Russ | well at 133MHz, the cycle time is 7.5ns |
| 06:59.11 | TomW`work | yeah |
| 06:59.24 | TomW`work | for each command cycle. |
| 06:59.49 | Russ | if I drew that out, it would be a sine wave |
| 07:00.10 | Russ | going to make a quick estimate on trace length...placing elements in pcb |
| 07:01.45 | TomW`work | at those speeds, keep the capacitance low! Keep only the necessary logic on those circuit lines, buffer the lines to other logic within the system. By using buffer logic, you can control what is loading the SDRAM signal lines. Should you later change the lenght of a trace, where the trace runs past, or the revision level of some innocent IC, you will be protected as to the impact it will have over the SDRAM. |
| 07:02.07 | Russ | everything is rated against 50pF |
| 07:03.03 | TomW`work | that is a lot of puffs (pfd's), isn't it? Try your Xc reactance formula and see just how significant a few puffs are when you are running at 133MHz. |
| 07:03.39 | sorphin | ;) |
| 07:04.24 | TomW`work | Think of it this way: the processor has a specific output impedance on a pin, when you put a higher load on that pin, the output will change more slowly. Lessen the load and the signal will move (rise / fall) more quickly. |
| 07:04.45 | Russ | the rise and fall time is rated on 50pF |
| 07:05.24 | TomW`work | So, you are saying that the total capacitance of your design (per pin) is < or == 50pf? |
| 07:07.07 | Russ | less than |
| 07:07.15 | TomW`work | Russ: what is the distributed capacitance on the PCB trace itself? Is it a significant factor? e.g. does the trace run over an internal PCB layer that is a ground / some other copper plane? |
| 07:07.20 | Russ | I'll probably want to caclulate trace capacitance as well |
| 07:07.27 | TomW`work | correct |
| 07:07.38 | Russ | the board is 6 layer and has ground and power planes |
| 07:07.46 | Russ | its one digital ground plane across digital logic |
| 07:07.54 | Russ | (analog planes exist as well) |
| 07:08.08 | Russ | the power plane between the video chip and the rest of the chip will be split |
| 07:08.09 | TomW`work | Well, you can always program the controller to 100MHz if the 133Mhz doesn't work. heh |
| 07:08.31 | Russ | I might put a few .1uF caps across the split near where data lines run across |
| 07:08.53 | Russ | or maybe move the split back behind the flip-flops, and then put some larger caps there |
| 07:09.46 | TomW`work | I look at the layout of a board as if it were a breathing animal, only way I can equate it is as that. Each subsystem has a pulse of it's own. |
| 07:10.53 | TomW`work | But, keep this in mind. A transistor is not a perfect device. The load impedance is reflected (seen) at the input of the device, but is divided by the Beta of the transistor. |
| 07:11.19 | TomW`work | IIRC, capacitance multipiliers work on this principle. |
| 07:11.50 | TomW`work | Beta == gain. |
| 07:13.08 | TomW`work | But, I am working at the limits of my knowledge here! I did not specialize in analog electronics, digital is what I have been doing with an appreciation for analog theory from RF work that I have done. I would locate a good analog engineer and pose some of your questions to them? |
| 07:13.32 | Russ | they are high speed FETs, so its a bit different from working with transistors |
| 07:13.49 | TomW`work | right, the prinicples differ. |
| 07:13.55 | Russ | I just like to get as many opinions as possible |
| 07:14.12 | Russ | not so much the principles, but the values on the spice model |
| 07:14.17 | TomW`work | IMO, split the high speed & low speed bus. |
| 07:14.18 | Russ | and a few things moved a bit |
| 07:14.45 | Russ | but see, a low speed device can offer free series termination if I place it close |
| 07:15.03 | TomW`work | I hate chasing those occasional "hiccups" when a signal timing gets upset by a transient on some ICs supply. |
| 07:15.11 | Russ | a lot of fucking bizzare things with high speed boards |
| 07:15.19 | Russ | people are making boards without any bypass caps |
| 07:15.24 | TomW`work | heh |
| 07:15.45 | Russ | instead they use a 4 layer board with ground and power in the middle layers, with predetermined spacing |
| 07:15.47 | TomW`work | that must be fun, not giving a clean supply to an IC |
| 07:15.49 | Russ | acts as a giant cap |
| 07:15.56 | TomW`work | yeah, yeah |
| 07:16.00 | TomW`work | :) |
| 07:16.08 | Russ | I'll be six layer though |
| 07:16.15 | Russ | I need to route agp signals too |
| 07:16.23 | TomW`work | BUT, _they_ use Spice to model those boards. |
| 07:16.35 | Russ | ya, I have spice |
| 07:16.44 | TomW`work | They model the entire board, right down to the traces on the board |
| 07:16.45 | Russ | its just a matter of determining all the data to put in |
| 07:16.57 | Russ | I'll probably not do very much crosstalk modeling |
| 07:17.35 | TomW`work | Some of the high end layout packages will do the modeling for you of the PCB charactoristics. I heard that this software is in the $18K plus range. |
| 07:18.28 | Russ | I'm not up to DDR SDRAM yet |
| 07:18.31 | Russ | or long lines |
| 07:18.35 | TomW`work | of course, at that price, I would rather change something on my PCB layout and have another proto built. |
| 07:18.51 | Russ | a capable scope would run me more than $18k |
| 07:18.59 | TomW`work | yeah |
| 07:19.51 | TomW`work | I was looking at a used Tektronix 2432: four channel, 300MHz, digital storage. Probably pick up a used one for $600..$1k. |
| 07:20.02 | TomW`work | 5ns / div |
| 07:20.34 | TomW`work | only 250 mega samples / sec though |
| 07:21.01 | TomW`work | Should be good enough for gov't work though? |
| 07:21.49 | TomW`work | Well, I have a nasty software bug to corner and swat... |
| 07:22.10 | Russ | that wouldn't even be a sample a high/low clock period |
| 07:24.00 | TomW`work | yeah, I know, but it is better than the scope I have now. I expect to design with a 200MHz+ processor within the next year or so. I don't expect to be able to have a scope to properly verifiy the operation of the SDRAM. I expect to do it via good design practice (and a lot of prayer ;). |
| 07:24.20 | Russ | its like dune I suppose |
| 07:24.23 | Russ | you need the spice |
| 07:24.29 | TomW`work | :D |
| 07:24.43 | TomW`work | love to have Blue Eyes |
| 07:25.02 | Russ | I almost do, but they are more green |
| 08:31.25 | TomW`work | bug swatted! |
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| 12:56.59 | chouimat | morning |
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| 14:09.12 | keath | Howdy |
| 14:16.49 | kergoth | hey |
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| 14:19.58 | sieve | morning all |
| 14:20.16 | kergoth | hey sieve |
| 14:20.45 | sieve | kergoth: how has dallas been treating you? |
| 14:21.19 | *** join/#elinux TimRiker (~timr@proxyle02.ext.ti.com) |
| 14:21.28 | kergoth | sieve: it hasnt really, havent done much but work and sleep so far :) |
| 14:21.31 | file | hi Tim |
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| 14:23.43 | sieve | kergoth: you shouldn't work too hard man. Take some time and visit deep ellum. :) |
| 14:24.59 | kergoth | TimRiker: morning tim |
| 14:25.07 | kergoth | sieve: yes, planning on it :) |
| 14:29.25 | CosmicPenguin | morning |
| 14:33.04 | CosmicPenguin | Heh - the local LUGs are getting together to picket SCO this week |
| 14:33.15 | CosmicPenguin | I love it - who said that BYU guys don't have a clue? |
| 14:51.39 | chouimat | hi guys |
| 14:52.22 | file | hi |
| 14:53.26 | chouimat | file: ozzy played for 3 hours last night |
| 14:54.17 | file | neat |
| 14:54.37 | chouimat | file about 60% of old black sabbath stuff |
| 14:54.53 | kergoth | nice. i love some of the classic stuff |
| 14:54.57 | kergoth | iron man, n shit |
| 14:55.12 | chouimat | kergoth: they started the show with wars pigs |
| 14:55.17 | kergoth | nice. |
| 14:56.10 | chouimat | kergoth: iron man, into the void, black sabbath, children of the grave, N.I.B, never say die, the wizard, paranoid, sweet leaf ... |
| 14:57.01 | chouimat | bark at the moon, crazy train, suicide solution, mr. crowlley etc ... only one or two of the new album |
| 14:57.19 | kergoth | sounds like a damn good show |
| 14:57.58 | chouimat | kergoth: yup, voivod was very good too but Finger eleven sucked real hard ... |
| 14:58.34 | chouimat | kergoth: they will be in dallas next :) |
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| 15:36.57 | file | CosmicPenguin: if you order the adult edition it's cheaper |
| 15:37.20 | CosmicPenguin | Adult edition? |
| 15:37.25 | DCipher | TimRiker: u there? |
| 15:37.27 | file | CosmicPenguin: the cover is different |
| 15:37.36 | CosmicPenguin | Heh - really:? |
| 15:37.43 | file | yeah |
| 15:37.49 | file | I'll get you a URL |
| 15:37.58 | CosmicPenguin | Its for my wife anyway |
| 15:38.59 | file | $17.99 USD on Amazon |
| 15:40.18 | sorphin | heh |
| 15:40.56 | sorphin | there was a thing on MSNBC earlier bout it/jk rowling/etc.. |
| 15:42.29 | CosmicPenguin | I think its a good thing, overall. I don't think there is anything wrong with kids jumping head first into a 800 page book |
| 15:43.14 | file | I'm not a kid. |
| 15:43.19 | CosmicPenguin | when I was a kid, I just remember people making fun of me for reading Robinson Crusoe when I was in third grade |
| 15:43.21 | file | I just like the book |
| 15:43.42 | CosmicPenguin | file: I know that - I just think its a good thing that kids are learning to read again |
| 15:43.43 | sorphin | file: uh.., no one said you were :P i've read all 4 books so far, and am no where near a kid :P |
| 15:44.02 | CosmicPenguin | My wife has read all 4 books, and she hasn't even seen the 2nd movie yet |
| 15:44.06 | sorphin | heh, someone stole thousands of copies of book 5 in merseyside |
| 15:44.15 | CosmicPenguin | And she was pissed at the first movie |
| 15:44.36 | CosmicPenguin | That doesn't sound like much - but its a big thing for Stacee |
| 15:44.59 | CosmicPenguin | Has only ever seen 1 movie without reading the book first (and oddly enough, it was Harry Potter... :-) ) |
| 15:46.05 | file | I still haven't seen LOTR: The Two Towers |
| 15:46.17 | CosmicPenguin | Hey - isn't Plan9 the oriiginal operating system on the Tuxscreen? |
| 15:46.36 | file | Inferno is |
| 15:46.47 | CosmicPenguin | Ahh, yeah. But Vita Nova distributes them both |
| 15:47.13 | CosmicPenguin | s/Nova/Nuova/ |
| 15:47.13 | file | Bell Labs made them both too |
| 15:47.30 | CosmicPenguin | Bell Labs made *everything* :-) |
| 15:47.32 | file | lol |
| 15:49.47 | keath | does anyone know of any good resources on building a stripped-down xfree86? |
| 15:49.59 | CosmicPenguin | TinyX |
| 15:50.59 | keath | ah.. thanks |
| 15:51.09 | file | I used TinyX once, it was fun |
| 15:51.37 | keath | wading through the full version is driving me nuts |
| 15:53.24 | file | whoever invented popups should be shot |
| 15:57.08 | paq | keath - look up kdrive.. there are a couple of good pages for it... rule-project.org uses it a lot too... |
| 15:58.23 | paq | (btw, anyone here owns one of those 3com audreys...?) |
| 16:01.49 | TimRiker | DCipher: sup? Got Linux? |
| 16:02.45 | TimRiker | paq: I've got an audrey, but I have not hacked it yet. |
| 16:05.20 | CosmicPenguin | paq: pattieja was Audrey hacking once upon a time |
| 16:07.16 | sorphin | TimRiker: yeah, for a "1 year LOA" |
| 16:09.15 | CosmicPenguin | poor transmeta - Linus was their only reason for living... :) |
| 16:22.39 | paq | TimRiker: oh... am trying to get mine to load alternate images... kind of weird that these images can't be written to my cf with dd |
| 16:23.04 | paq | CosmicPenguin: thanks, guess i'll wait til he gets unidle |
| 16:31.43 | keath | thanks, paq |
| 16:35.49 | paq | keath: sure... btw, what's your target platform? (and what video chipset) |
| 16:36.48 | keath | varies.. i'm putting together a linux for very-low end machines, ia1, old laptops, etc |
| 16:40.17 | paq | i see... you'll probably be making the vesa and/or framebuffer tinyx then.. |
| 16:49.05 | DCipher | TimRiker: was looking for the BusyBox home page |
| 16:49.41 | DCipher | TimRiker: i have the latest version for my Coyote board now... just wanted to make sure! |
| 16:50.03 | keath | http://www.busybox.net |
| 16:50.14 | DCipher | thanks! |
| 17:39.39 | TimRiker | DCipher: see how easy that is? ;-) |
| 17:40.20 | TimRiker | DCipher: http://www.ubergeek.tv/switchlinux/ hehehe |
| 17:42.55 | file | well this bites, I don't think I got the job |
| 17:47.05 | CosmicPenguin | Why would a website called ubergeek use Flash? |
| 17:47.11 | CosmicPenguin | That doesn't seem very ubergeek to me? |
| 17:47.24 | CosmicPenguin | file: I'm sorry. |
| 17:48.15 | file | CosmicPenguin: I called the organizer of the program to verify... had to leave a message on her voicemail |
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| 17:49.24 | CosmicPenguin | What is google celebrating today? They changed their logo, but I don't know what its supposed to be representing |
| 17:50.45 | levi | Something about M.C. Escher |
| 17:53.18 | levi | Yup, it's his birthday. |
| 18:00.34 | sorphin | just looks weird to me |
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| 18:19.16 | file | hi andersee and Russ |
| 18:19.40 | kergoth | hey andersee, Russ |
| 18:19.57 | andersee | g'day kergoth, file |
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| 18:35.33 | DCipher | TimRiker: I have to admit, i didn't have to do the upgrade, got a new BSP for my Coyote board - Metrowerks did it :) |
| 18:36.53 | file | KDE is done compiling, it took 3 days |
| 18:49.12 | chouimat | DCipher: I have 3 dead old pc (for pieces) |
| 18:51.33 | DCipher | chouimat: i have 3 PII 350's, 1 PIII 600 and 1 IBM PC Server 704 sitting around collecting dust... |
| 18:52.21 | chouimat | DCipher: I have 2 workinng P200MMX, 1 PIII/667 (main box) and 1 PIII/1000 |
| 18:55.27 | DCipher | chouimat: So, what's the best thing to do with old machines!!! |
| 18:56.06 | file | DCipher: set them all up and use distcc? |
| 18:56.21 | file | spread your compiles across 5 old PCs and gain a speed increase? |
| 18:56.41 | kergoth | distcc and ccache rock |
| 18:57.00 | DCipher | i guess i need to write bigger code ;) |
| 18:59.51 | chouimat | DCipher: router and legacy app |
| 19:02.26 | DCipher | Hmmm... i've got 2 routers already! |
| 19:04.37 | file | okay - I may have gotten a job teaching this summer. |
| 19:12.40 | chouimat | DCipher: webserverr |
| 19:15.37 | DCipher | chouimat: got one - P4 2.4 Ghz! These are my retired servers |
| 19:20.32 | chouimat | DCipher: let then colllect dust then if you're so picky ;) |
| 19:20.49 | DCipher | :) |
| 19:28.23 | pattieja | CosmicPenguin: just missed him |
| 19:28.33 | pattieja | TimRiker that is |
| 19:30.30 | CosmicPenguin | pattieja: it was paq that was asking about the Audrey |
| 19:31.33 | pattieja | oh |
| 19:31.36 | pattieja | k |
| 19:31.49 | pattieja | hello paq |
| 19:32.58 | pattieja | CosmicPenguin: actually, I kind of gave up on it for the time being because I didn't get my hands on a compatible 3Com USB network adapter that works with the Audrey |
| 19:33.16 | pattieja | they only installed drivers for a very specific model of USB adapter |
| 19:33.16 | CosmicPenguin | pattieja: bummer |
| 19:33.55 | pattieja | I bought one from 3Com thinking it would work, but it was the next model up (supporting 10 and 100Mbit) and it isn't even detected that anything's on the USB chain |
| 19:33.59 | pattieja | so... |
| 19:34.09 | pattieja | I haven't felt like hacking it over the modem yet, either |
| 19:34.23 | pattieja | and it can't run Linux yet as far as I know |
| 19:35.06 | pattieja | although development was rumoured to have started out on Linux, they switched it to using QNX and put a bootloader in the flash that won't let anything but a valid QNX filesystem image to be uploaded |
| 19:35.34 | pattieja | someone was working on a possible 3 step procedure to get Linux on the Audrey, but I don't think that's gotten anywhere yet |
| 19:36.00 | pattieja | something about a fake QNX filesystem that has a program that will flash a Linux bootloader in place over the QNX loader |
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| 21:30.31 | CosmicPenguin | sorphin: http://www.thinkgeek.com/computing/drives/5ee4/ |
| 21:31.01 | Russ | andersee: are you ready to file an injunction pending compliance and start a punitive lawsuit? |
| 21:32.40 | MonMotha | now if I could just figure out why this thing won't start init |
| 21:33.01 | MonMotha | (although it might actually be starting init...who knows) |
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| 21:38.51 | CosmicPenguin | irony: http://www.internetwk.com/breakingNews/showArticle.jhtml?articleID=10700268 |
| 21:39.14 | Russ | right, so now is a perfect time for an injunction |
| 21:39.26 | Russ | 2 week long injunction, and we don't need punitive damages |
| 21:40.41 | Russ | should I find my own lawyer at this point? |
| 21:40.48 | CosmicPenguin | The question is - can you prove irreparable harm to the complaintant if they keep selling devices? |
| 21:40.54 | andersee | I spoke with my Dad about it on Sunday. We gave Linksys a deadline of the 16th... No contact. |
| 21:41.16 | Russ | so there is no reason that they should legally be able to continue to sell devices |
| 21:41.25 | CosmicPenguin | I just worry that the judge will say "Sooo... how much do you make with this Busybox application?" |
| 21:41.43 | Russ | he makes money consulting |
| 21:41.54 | CosmicPenguin | True |
| 21:42.12 | Russ | I think the main point is, that if linksys came to me, and said how much for an exclusive udhcp license, that should be the amount |
| 21:42.36 | andersee | Russ: my dad is in court today, so I havn't been able to get hold of him |
| 21:42.37 | CosmicPenguin | For the injuction, or for the damages in a suit? |
| 21:42.37 | Russ | andersee: oh, btw, the three code forks of udhcp on linksys, belkin, and buffalo share no similarities (at least by strings) |
| 21:42.48 | andersee | Russ: interesting |
| 21:42.59 | Russ | CosmicPenguin: I think it would be more punitive than damages |
| 21:43.06 | CosmicPenguin | Russ: definately. |
| 21:43.20 | andersee | Russ: these days, I make most of my money as a federal contractor |
| 21:44.10 | andersee | Russ: mainly to make things conveinient for my Dad, we will probably be filing in the state of Oklahoma. |
| 21:44.27 | Russ | why not california? |
| 21:44.32 | Russ | because he's bar'd in ok? |
| 21:45.06 | CosmicPenguin | To be or not to be? :-) |
| 21:45.07 | andersee | Russ: yup. He is bar'd in Ok, NY, Fl, AZ, and UT. But not CA. |
| 21:45.15 | CosmicPenguin | Oh, the other bard.... |
| 21:45.32 | MonMotha | grr |
| 21:45.37 | MonMotha | ibot lart init |
| 21:45.47 | Russ | ok isn't far, I'd be willing to fly there if neccessary |
| 21:45.58 | Russ | MonMotha: make a c program that does: |
| 21:46.18 | andersee | Russ: and he currently lives in Ok. But he was explaining that the constitution guarantees a judgement made in any state applies to all others. So it isn't an issue. |
| 21:46.21 | Russ | for (;; sleep(1)); printf("ping!\n"); |
| 21:46.22 | Russ | er |
| 21:46.28 | Russ | extra semicolon there |
| 21:47.09 | MonMotha | Russ: well, I've tried invoking other binaries such as our friend "cat" (though I guess that's a part of busybox) |
| 21:47.30 | Russ | MonMotha: if init dies (returns) you aren't likely to get your output |
| 21:48.18 | MonMotha | cat shouldn't immediately die if invoked with no options tho, right? |
| 21:48.43 | Russ | won't give you any output... |
| 21:49.02 | Russ | I would make a small c program that prints stuff and sleeps in a loop |
| 21:49.27 | andersee | Russ: anyway, when my Dad gets back from court (a bankrupty I think he was handling) I'll be getting hold of him. If you shoot me your phone #, we could conference you in. |
| 21:49.48 | Russ | (480)921-1664 |
| 21:50.29 | andersee | Russ: k. |
| 21:51.04 | Russ | its pretty disturbing that most of the big bold bullets on the back of the box are from unlicensed software |
| 21:51.21 | Russ | "dhcp server automatically assigns IP addresses" |
| 21:56.25 | Russ | its too hard to tell how long this will be drug out |
| 21:57.08 | MonMotha | doh |
| 21:57.09 | MonMotha | doh |
| 21:57.13 | MonMotha | forgot to recompile glibc |
| 21:57.17 | MonMotha | it's still compield for 586 |
| 21:57.30 | MonMotha | andersee: you own some SCOX? |
| 21:57.40 | Russ | oh, another tip, use a statically compiled init test prog |
| 21:57.48 | Russ | MonMotha: "sell SCOX short" |
| 21:58.03 | Russ | it means you wager on a stock falling |
| 21:59.19 | Russ | it did fall 2% yesterday and 3% today tho |
| 22:01.03 | MonMotha | oh, sorry, didn't see the "short and profit" |
| 22:02.09 | MonMotha | very fun |
| 22:14.27 | CosmicPenguin | andersee: you see the posts about picketing SCO on Friday? |
| 22:20.19 | TimRiker | CosmicPenguin: where? |
| 22:21.28 | CosmicPenguin | TimRiker: beautiful downtown Lindon, of course... :) |
| 22:21.40 | CosmicPenguin | The BYU LUG thought it up |
| 22:22.12 | andersee | CosmicPenguin: no I missed that |
| 22:22.18 | andersee | CosmicPenguin: url? |
| 22:22.32 | CosmicPenguin | andersee: it was discussed on the SLLUG mailing list - I don't think anyone has set up a web site yet |
| 22:23.36 | andersee | CosmicPenguin: ahh. I unsub'd from the SLLUG list when I moved, which is why I missed it |
| 22:24.13 | CosmicPenguin | andersee: yeah, I guess you're a plugger these days... :) |
| 22:24.15 | TimRiker | hmm... aren't you still an officer? ;-) |
| 22:25.07 | andersee | TimRiker: technically I suppose I am. Though I've been hoping to get new elections for about 3 years now. :) |
| 22:25.51 | andersee | technically, I'm still president (despite by best efforts at resigning) |
| 22:27.47 | Russ | it'd be fun |
| 22:41.43 | jacques | hi guys |
| 22:41.47 | jacques | what's new? |
| 22:41.52 | Russ | afternoon |
| 22:43.30 | jacques | andersee: where in OK ? |
| 22:43.59 | Russ | ' Anyway, after a charming lecture by Bill Ritenour on the need for electrostatic shielding at gasoline pumps...' |
| 22:44.02 | andersee | jacques: My dad's office is in Edmond (where I went to high school) |
| 22:44.29 | jacques | I think we passed through there when I was on vacation....going to the aquarium |
| 22:44.41 | jacques | my family is in norman |
| 22:47.21 | andersee | jacques: small world, huh? |
| 22:48.27 | *** join/#elinux TheMasterMind1 (~aman@h-68-166-76-13.MCLNVA23.covad.net) |
| 22:48.36 | jacques | andersee: yep :-) |
| 22:58.46 | Russ | 'the SIA predicts that by 2009, DRAM chips will hold 64 billion bits of information, processors will clock data at 6000 MHz, and ASIC packages will bristle with 4000 connections.' |
| 22:59.36 | Russ | (prediction made in 1998) |
| 22:59.47 | Russ | think they underestimated clock speed |
| 23:00.00 | Russ | unless they are talking about DRAM clocks |
| 23:00.06 | andersee | Russ: I think you wouldn't want to solder those 4000 connections by hand though |
| 23:00.24 | Russ | andersee: duh, it'd be an FQUD package |
| 23:00.30 | MonMotha | Russ: with intel going at it? yeah... |
| 23:00.40 | Russ | integrated between the layers of the PCB |
| 23:01.53 | jacques | if not for AMD, Intel would currently be at about 1.2GHz |
| 23:02.15 | Russ | (if case you are wondering, I pulled FQUD out of my ass) |
| 23:02.45 | andersee | Russ: hehehe |
| 23:03.03 | Russ | I do forsee greater pcb/package integration though |
| 23:04.23 | file | okay all, I'm going to be gone from Sunday till Thursday |
| 23:05.21 | Russ | have fun |
| 23:05.23 | andersee | Russ: I predict chips are gonna start getting their own high speed serial busses to precisely to prevent having 4000 connectors per chip... |
| 23:05.36 | file | it's for a workshop... at the university... |
| 23:05.54 | Russ | asics are already approaching 2000 connections if they haven't already exceeded that |
| 23:11.43 | Russ | chouimat: so all is forgiven? |
| 23:13.49 | chouimat | Russ: I was searching some books ... |
| 23:13.59 | MonMotha | jacques: that's true |
| 23:14.19 | chouimat | ... and I forgot I allready packed them, I thought that my ex-wife took them 3 years ago |
| 23:14.24 | MonMotha | and to be fair to intel, the P4 is at least decently fast at things your average consumer does (not that your average consumer needs them to be that fast!) |
| 23:14.43 | MonMotha | CompUSA reccomends things like 2GHz celerons these days for "casual surfing and email" |
| 23:14.49 | jacques | heh |
| 23:14.53 | file | lol |
| 23:15.25 | jacques | only consumer activity which requires high end these days is gaming |
| 23:15.29 | CosmicPenguin | You need 2Ghz just to run the damn basyian filter for the SPAM |
| 23:16.13 | MonMotha | jacques: and home video encoding |
| 23:16.26 | MonMotha | you would not believe the number of peopel who love to take their home movies and burn them to DVDs |
| 23:16.36 | chouimat | MonMotha: wow |
| 23:16.43 | jacques | MonMotha: if using the proc then yes |
| 23:16.48 | sorphin | MonMotha: heh |
| 23:16.50 | jacques | as opposed to an accellerator |
| 23:17.05 | MonMotha | and to be fair, MPEG2 encoding in software takes a lot of horsepower (and P4s are good at that, they don't like branchy stuff tho) |
| 23:17.11 | sorphin | MonMotha: i have vhs i want to convert :P but i'll be using a diff device than my peecee for that |
| 23:17.38 | MonMotha | jacques: hello, why wuold they put a big mpeg encoder in when they would ahve to put a lsower proc in to get the same speed comp, and then could only claim 1.7GHz which is the number people look at? |
| 23:17.46 | jacques | I hear the pvr250 linux driver is working well these days |
| 23:17.52 | MonMotha | (never midn that it would actually be FASTER in many circumstances!) |
| 23:18.10 | sorphin | :P |
| 23:18.14 | jacques | MonMotha: yeah in computers ppl only look at MHz and cars only HP |
| 23:18.37 | CosmicPenguin | HOw else are they going to sell them? |
| 23:18.40 | Russ | I have people that tell me they have 256Mhz of ram |
| 23:19.09 | jacques | lol |
| 23:19.11 | CosmicPenguin | I have people tell me they have 60 gigs of memory |
| 23:19.23 | jacques | LOL |
| 23:19.34 | MonMotha | oh, people confuse RAM and hard drive size all the time |
| 23:19.42 | kergoth | god that pisses me off |
| 23:20.47 | sorphin | CosmicPenguin: well, i don't have 60G of memory, but i do have 1.5G ;) |
| 23:21.07 | file | chouimat: you can run M$ Office with Crossover Office |
| 23:21.10 | MonMotha | sorphin: hey, that's how much I have...we can't BOTH have that much, right? our computers aren't botht he samemodel! :) |
| 23:21.24 | sorphin | MonMotha: mine isn't a model ;p |
| 23:21.37 | jacques | andersee: are you updating the uclibc devel env to gcc 3.3 ? |
| 23:21.43 | MonMotha | nor is mine :) |
| 23:21.49 | MonMotha | but you'd be surprised how many people woudl say that |
| 23:22.17 | andersee | jacques: I rebuilt for x86, mips, ppc, and arm on Saturday with gcc 3.2.3... |
| 23:22.57 | andersee | jacques: I've been working on a _very_ tricky series of problems with dlopen() in the hope of getting that into the 0.9.20 release |
| 23:23.01 | jacques | andersee: ok, I have just been reading on l-k about kernel compile bugs with 3.2.2 - dunno if that applies to 3.2.3 - they say it works with 3.3 |
| 23:23.18 | jacques | hell it might only apply to x86 |
| 23:23.59 | andersee | jacques: I saw that. I've been building with 3.2.3 thus far. I want to carefully check out gcc 3.3 before using it more extensively. |
| 23:24.06 | chouimat | anyone know if dictd use a lot of memory? |
| 23:24.38 | jacques | andersee: sounds wise :-) |
| 23:36.36 | *** part/#elinux GPSFan (~kenm@65.114.238.130) |
| 23:45.22 | Russ | 'In polite engineering circles, this situation is calmly referred to as a "fundamental trade-off." Late at night, when we engineers let our hair down, I've heard other terms used to describe it.' |
| 23:45.36 | Russ | howard johnson reminds me of dna for some reason |
| 23:51.45 | jacques | andersee: OK so the 3.2.3 deve env is not released yet? no rush - I just dont seen it on your site |
| 23:52.47 | andersee | jacques: tru |
| 23:52.48 | andersee | jacques: true |
| 23:53.02 | andersee | jacques: I can post it now if you want though... |
| 23:53.03 | jacques | np I can wait until you get 0.9.20 |
| 23:53.13 | andersee | jacques: which arch you want? |
| 23:53.15 | jacques | arm |