IRC log for #arm-netbook on 20130212

00:08.05*** join/#arm-netbook theRat (~theRat@172.126.96.58.static.exetel.com.au)
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00:31.33theRatI think I found a problem in all the .fex files for the A10.  spi0_para is configured to use feature 3 while the datasheet says it should be 2.
00:32.59vinifmmy script.fex for a13: http://dl.dropbox.com/u/22273442/A13/script.fex
00:33.10vinifmi use spi2
00:35.08vinifmlook here: http://linux-sunxi.org/A10/PIO
00:35.37theRatAfter changing to feature 2 I now get a signal on CS, but no CLK.
00:36.01vinifmmux indicates the function that you want
00:37.08theRatthat table agrees with the datasheet.  all the .fex's that I have looked at for the A10 are wrong.
00:37.38vinifmset up mux to the desired function
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00:38.05vinifmuse this table, it is correct
00:38.21theRatI have done that, looking at my scope I get CS, but no CLK.
00:38.53vinifmwhat spi bus?
00:39.21theRatSPI0
00:41.07vinifmSPI0_CLK = 3 (mux 3)
00:42.27theRatmy board exposes the pins on port I so it is mux2 there
00:43.18vinifmmux 2 = NCLE
00:43.45vinifmif you wnat CLK use 3
00:43.54vinifm*want
00:44.30theRatPI11 mux2 aslo = CLK which is the pin I have access to
00:44.54vinifmSPI0_MOSI, SPI0_MISO, SPI0_CLK is 3
00:47.51theRatthose fucntions are also available on PORT I.  PI10=CS0 PI11=CLK PI12=MOSI PI13=MISO
00:49.29vinifmyou can use only one port, enable one and disable other
00:50.36vinifmi mean, use spi pins in just one port
00:51.53vinifmfor example, i use: [spi2_para] spi_used = 1...
00:52.39vinifmso i need do: [csi0_para] csi_used = 0
00:53.27vinifmbecause PE00, PE01, PE02 and PE03
00:53.42vinifmbecause PE00, PE01, PE02 and PE03 are used for csi
00:54.50theRatI believe I have my .fex correct, while post a link shortly
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01:00.07theRatmy fex file http://dl.dropbox.com/s/d8chtqkh9k94v90/cubieboard.fex
01:03.11GeorgeIoak__anyone have an A10 based tablet with reisitive touch screen and calibration program? the calibration program isn't working with my 15.^' screen and i wanted to try a different code to see the results
01:19.09vinifmspi_sclk = port:PI11<3><default><default><default>
01:19.29vinifmspi_mosi = port:PI12<3><default><default><default>
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01:19.48vinifmspi_miso = port:PI13<3><default><default><default>
01:20.14vinifmtheRat:  SPI0_MOSI, SPI0_MISO, SPI0_CLK is 3
01:25.07theRatvinifm: where does it say that?
01:26.10vinifmhttp://linux-sunxi.org/A10/PIO
01:27.04vinifmPC0, PC1 and PC2
01:27.29theRatthats what I am looking at also.  Next to PI10-14 the SPI pins are all listed as mux2
01:27.59vinifmhum, i did understand
01:31.31vinifmnand_cle = port:PC02<2><default><default><default>
01:32.08vinifmspi_sclk = port:PI11<2><default><default><default>
01:32.31vinifmno conflicts
01:35.00vinifmsorry, i was wrong, your spi0_para is correct
01:41.29vinifmtheRat: you are trying to use a driver chip?
01:43.22theRatat present I have just connected my scope to the pins to see that I get activity. the master will generate signals with no device attached
02:02.11theRatvinifm: i will enable all the debug code in spi_sunxi.c and see if I can figure out what is happening.
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02:03.10vinifmtheRat,  what is the problem?
02:05.02theRatWhen I write/read using a test program I get CS going low, but no CLK signal or data.
02:07.11vinifmuser space program?
02:07.51theRatyes, using spidev
02:08.06vinifmok, just 1 minute
02:08.40vinifmwhat function do you use for read and write?
02:09.40theRatI am using this code http://www.kernel.org/doc/Documentation/spi/spidev_test.c with the spi port changed.
02:10.35theRati see messages in dmesg that indicate it is handling the request.
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02:12.20vinifmtheRat, spi_sunxi.c dont supports full duplex for now
02:13.17vinifmso, '.tx_buf = (unsigned long)tx, .rx_buf = (unsigned long)rx,' can not be used
02:14.24theRati just found that!  how stupid since by its very nature spi is full duplex.
02:15.36vinifm?
02:16.21theRati just figured it was failing because of both buffers being used. ie. no full duplex
02:17.06vinifmspi_sunxi.c dont supports full duplex for now
02:18.24vinifmif(t->tx_buf && t->rx_buf)    return -EINVAL;
02:18.27theRatI might have to look at changing that.  The hardware supports full duplex, so its should just be a driver issue
02:19.21vinifmLINE 813: if(t->tx_buf && t->rx_buf)    return -EINVAL;
02:21.04vinifmI'm trying to add full-duplex spi_sunxi driver
02:21.54theRatit shouldnt be hard since to do a read you already are writing, you just need to write the correct data.
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02:33.09extrados1I'd like to move my debian install from an external sd card to the internal nand. However, when I use nand-part, it throws an error, "all partition tables are bad". fdisk, on the other hand, seems to read /dev/nand fine. Any advice on how to proceed?
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02:37.37mdptheRat: I tried to poibt that our earlier in a more subtle way :) the hw does it. just the driver is broken
02:38.13mdps/poibt/point
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04:21.07theRatmdp: I didn't see that :(  Only new here.  I am now looking at how the driver could be unbroken.
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04:30.43mdptheRat, there's a bunch of drivers in the kernel that have similar simple spi ip like A1x. use them as a model. several set up both pio and dma driven transfers when a request arrives with both tx and rx buf valid
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04:36.56mdptheRat: davinci_spi.c is an easy to follow example
04:37.32mdper, spi-davinci.c
04:38.19theRatmdp: ok, will have a look.  the sunxi one doesn't look too hard to fix either
04:38.42mdpshouldn't be
04:38.47mdpok, bbt
04:39.29mdpI have interest in this being fixed too..but in the upstream driver effort
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09:04.23krackernHello all :)
09:05.38krackernhow may one compile u-boot for a particular device?  I have my script.bin with dram parameters all filled..
09:07.54torindelkrackern: uboot is more or less universal assuming you're happy with env placement, and you can boot without it also
09:08.29torindel(so you could use your current working uboot from android for example)
09:09.17torindelif you want to build it the sources for sunxi fork are on git
09:10.11krackerntorindel: Yes I pulled the sources... but the wiki was a bit hazy
09:11.08krackernmake 'boardtype'
09:11.28torindelkrackern: ask your self question do you need uboot, boot.axf can load kernel directly (instead of loading uboot)
09:11.29krackernbut I think I have a different boardtype
09:11.47torindeland have menu ability too
09:12.03krackernoh is it?
09:13.11torindelkrackern: look at ini files on nanda partition
09:14.03torindelyou can even setup graphical menu which operates with basic hardware buttons
09:14.59krackernnice idea... Can you put up a sample of changed file? Any documentation for this?
09:16.03torindeltheres a lot of nanda partition dumps on git, you could look at that, plus theres actual crane_sdk_docs which say you egzactly how to configure those ini's to make it work
09:17.06RaYmAntorindel: have you actually gotten this supposed graphical menu to work?
09:17.32torindelRaYmAn: havent tryied as i dont dual boot
09:17.45RaYmAnright.
09:17.56RaYmAnI haven't heard of anyone actually getting that working so far.
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09:18.58torindelRaYmAn: we got docs how to do it, plus most probably you would see it working state on some window mobile image xd
09:19.49RaYmAndocs and real world rarely coincide in the world of allwinner ;)
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09:24.55torindelkrackern: info on boot.axf is in "how to config, pack, download firmware v1.0.doc" on crane_sdk_docs
09:41.16krackern:)
09:42.05krackernHey that helps ...Will check it out.. Thanks torindel  ;P)
09:43.38krackernerm... its is chinese!
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09:50.08torindelkrackern: google translate to the rescue! plus you'll get most of things from that samples there without reading chinese xD
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10:26.07mnemochansg: is your reply to the dpms off patch an ack?
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10:48.02hansgmnemoc, no not really. I've a new version of all my + hamrach + Floris's patches combined here:
10:48.19hansghttps://github.com/jwrdegoede/linux-sunxi/commits/fedora-18-3.4-2https://github.com/jwrdegoede/linux-sunxi/commits/fedora-18-3.4-2
10:48.28hansgI was about to send the set to the list :)
10:49.05hansgThat set is the same as hamrach's latest set with the dpms patch replaced by Floris' version (with the deadlock fixed) + some fixes if my own
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10:55.39hansgmnemoc, send, not going afk for lunch now
10:55.56mnemochansg: cool. thanks!
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10:56.11hansg_afks/not/note/
10:56.13hansg_afkyour welcome
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11:19.21slapinhi, all!
11:23.09slapinhow hard it is to route DDR3 memory for A13 CPU?
11:28.15mnemocslapin: tsvetan @ #olimex can answer that
11:36.45L84Supperis that a question like " is that expensive?"
11:37.25L84Supperor "is that heavy?"
11:38.21L84Supperif you're asking I'd say it going to be difficult for you
11:38.23mnemocas a not-ee guy i've always understood DDR3 routing as hard
11:38.54L84Supperit just like code
11:39.14L84Supperyou can make something work with clean or crap code
11:39.28L84Suppersame with boards
11:39.40mnemocthe cubieboard's ddr3 runs at 480MHz. I suppose their routing is very lean and sexy
11:39.51mnemocmost craplets do it at 360
11:40.42rmyeah it's not like half of the cubieboards don't actually work :)
11:40.48rmdoes not seem that way at all!
11:40.50L84Supperhow stable is it over temp? if you rub your socks on a balloon withing 4 ft will the esd kill it?
11:40.50rmfrom the mailing list
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11:46.56L84Suppersomebody is working on an FPGA daughter board for the cubie
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11:53.51Triffid_Hunterslapin: for a start, all the lines need to have the same length so that the signals don't get scrambled on the way from ram to cpu.. usually you do this with 'meanders', little wiggles that lengthen the trace.
11:54.11Triffid_Hunterslapin: however the meanders introduce inductance, which means that the signal moves through the meander more slowly than through a straight trace of the same length, so you need an accurate model of all the parasitic behaviours of the board itself to do it properly
11:57.24L84Supperjust use the modeling plugin for Kicad for things like that  :)
11:59.39slapinL84Supper: where I can get this one?
11:59.49hramrachrm: from the mailing list it seems thre were hundreds of boards delivered and a few of them are broken so not bad
12:00.19hramrachbut there are also users that probably have working board but complain that the pre-installed iamge does not do what they want
12:00.27L84Supperslapin: it does't exist, that's why you should't bother with using Kicad
12:00.36mnemoci thought all troubles were related to the defective dc cable
12:01.57hramrachsome seem to be related to boards not boting and users not able to install a working image
12:02.35hramrachI had on lockup with the board so far and it sometimes does not boot from nand when I remove the mmc card
12:03.01L84Supperdid they die in shipment or are they just shipping whatever comes off the line without any testing?
12:03.04hramrachrunning the board 24/7 for a few weeks by now
12:03.13slapinthat's all cool, but I've not got mine at all :(
12:04.04hramrachL84Supper: presumably they test them.
12:05.11hramrachthera are people who had the headphone jack come off and the SD slot needing the card pressed against the PCB to work, and there are those cable issues
12:05.12L84SupperI wonder if parts are coming loose during shipping
12:05.35hramrachso I guess the fab quality is not the highest
12:06.01hramrachmight be
12:06.36hramrachthe thing is fab quality is something you will only see from user reports, not so much from testing before shipping
12:06.52hramrachnor from looking at a test run
12:07.19hramrachwhich the factory might do at  better quality as has been the case with the DC cable samples :s
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12:15.04L84SupperQC is always tough in China
12:15.53Alex1269mnemoc, hi.. Are you here ? :)
12:19.13mnemocAlex1269: leaving :< back in 30m
12:19.42mnemocAlex1269: btw, I'll apply your patches after backporting plat-sunxi to 3.0
12:19.58Alex1269wow...
12:20.12mnemocor it will be impossible to keep both trees maintained
12:20.15Alex1269now all my questions gone....
12:20.26mnemoc:)
12:20.33mnemocbbl
12:20.55Alex1269I wanted to make patch for 3.0/3.4 but plat-sunxi....
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13:17.36focusTriffid_Hunter: I soon to start laying out A10 with DDR3 in KiCAD - http://www.gplsquared.com/SoM2/SoM2.html
13:18.29focusI hardly believe any of the stuff I hear about equilength tracks.
13:18.55focusMeandering as slapin says causes inductance - and also its big radio transmitter at those frequencies
13:19.31focusTo make lines equilength, best to twist a pair around each other in PCB - that automatically makes them near equilength
13:20.03focusOK for USB, but things like DRAM a bit tricky because of the parallel buses.
13:20.59focusFor those, my idea for parallel bus is to twist each data wire with a ground wire, and bunch the lot together. That keeps their average lengths the same.
13:21.17focusMore drill holes, but a lot fewer calculations
13:25.49mnemocisn't it awfully more complex to manufacture?
13:26.13focusthe total number of wires that need special treatment is not that many
13:26.43focusall the gpio wires don't care
13:27.15mnemocgood gpio lines would let you implement pcie ;-)
13:27.40focusthen those particular lines need a lot of attention sadly
13:34.56rmPandora http://www.youtube.com/watch?v=yfaPdlqsWjg&feature=player_detailpage#t=130s
13:35.37mnemocanyone got some specs of http://postimage.org/image/y2l75mw49/ ?
13:35.50mnemocfocus: are you adding the axp on the module too?
13:36.18focusTo twist a wire in PCB across 2 layers requires 2 extra holes per twist. Need to twist my be once if not twice.
13:36.36focusmnemoc: yes
13:37.48mnemocdoes that allow you to hook a LiPo on the base board?
13:39.37focusThe SoM module will have a two pin connector for power. The idea of powering it up through the SoM edge connector sounds a bit naff - although if you do use enough pins, it should be OK.
13:40.09focusThe mboard will have option for lipo, charger, and interface connectors.
13:40.28focusThe LCD connector is on the SOM board - that rescues 40 connections from being wasted.
13:40.48mnemocusing a separated charger, won't that allow you to use a simpler pmu like the axp15?
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13:42.11focusnot fussed really - first attempt is AXP209 anyone can make their own derivatives - the cubie and eoma use axp209 which is why I copy theirs
13:42.51mnemoci see
13:44.09focusrm: the pandora has steep price 500+ euros about $700!!
14:46.37hramrachfocus: the meandering is standard practice seen on many boards
14:48.05hramrachI can't really say anything about the ee advantages and drawbacks over routing through multiple layers and the relative manufacturing complexity and reliability
14:48.11hramrachnot ee person
14:50.17hramrachbut I would expect more holes = more costs, more potential failure points, holes take up space in all layers, need safety space around, have non-trivial size so possibly adding again to parasitic resistance and capacity
14:51.56hramrachfeel free to enlighten me on how all the boards I see use crappy engeneering ;-)
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14:56.44mdpI can also confirm that's an industry best practice for routing this stuff. hardly a product of crappy layout.
14:57.11mdpthe same thing happens on rgmii phy trace layout too to get the lengths correct for delays
15:00.59hramrachwell, maybe timtowtdi
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15:18.34hramrachextrados1: what device do you have?
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15:44.14L84Suppera good designer tries to limit the amount of vias in a board, especially high speed signal lines, but some people only learn from their own experience and not from from the experience of others
15:44.40L84Supperreminds me of something about history and being doomed
15:47.36slapinL84Supper: any examples?
15:50.24L84Supperthere is a ton of literature out there and application notes on high speed pcb design, spend a few days reading it, it will give you a chance to layout a working board
15:51.10L84Suppercheck Altera, Intel, xilinx and several other manufacturers sites with app notes on PCB layout
15:52.50L84Supperhttp://www.youtube.com/watch?v=vC8wEP9r__w
15:53.20L84Supper^^ used Altium
15:53.42L84Supperhttp://www.youtube.com/watch?v=gxsqWE56i_k
15:54.03L84Suppertook him 38 hours using Altium to get it right
15:55.27L84Supperonce you do a few it won't feel like it takes forever
15:57.19focushramrach: I know the meandering is standard practice and it probably the best for more compact boards, but my electronics training doesn't agree with it. Better to twist cables - but it costs more - a pair of holes per twist and at least two twists needed to make full 360 degree twist
15:58.09focusI first try to make my boards with twists and if it falls apart, i make it with meander
15:59.25L84Supperfocus: the problem is that your designing a pcb with it's design rules, if you could 3d print a board then you actually could run twisted pairs, but you don't have to
16:01.20L84Supperfocus:  http://www.pcisig.com/developers/main/training_materials/get_document?doc_id=6d37ec2f8543fc1f9d8ace6264d08b469f57e5f1
16:01.49L84Supperlaying out PCI Express is a good example
16:06.13focusL84Supper: thanks for that link. Twisting tracks around each other between two layers is easy but costly - a pair of holes per 180 degree twist. The advantage is that the wires are nearly equilength automagically if routing a USB pair for example.
16:06.49focusNot so easy with busses - need to twist a signal wire with gnd wire. and then collect a whole bunch together to make the whole bunch nearly equilength
16:07.30focusThe advantage is that reflections and unwanted coupling is much lower. That providing the first twist is not too far from chip where signal originates from.
16:08.46focuslong parallel lengths at high frequencies are badly prone to reflection when other tracks come near or there is sharp bend in the wiring
16:10.16focusBut you can avoid all that with twisting because the twisting forces electric fields and magnetic fields to behave slightly differently and reduce all these side effects
16:13.09focusAt high speeds, electrons get to run more of a ballistic mode and build up 'speed' and anthing that impedes it will cause a reflection. But when the wires are twisted, there is less chance of ballistic like transport and less chance of reflections
16:13.23focusAll theory - need to test it out in practice with GHz ARM :)
16:22.23L84Suppervias are high speed corners
16:23.33L84Suppersome high speed buses count on the reflections
16:25.32L84Supperfocus: spend some time reading about microstrip and stripline
16:27.39focusL84Supper: I am full ee, know all that. My training doesn't agree with 'best practice' of day - I don't know when the disconnect happened - I haven't been designing GHz ARM chips lately :(
16:29.51hramrachthere is evolution even in PCB design
16:30.23hramrachthe question is if your course materials were cutting edge or outdated since they don't agree with established paractice
16:31.26hramrachyou can look for more materials or do your own measurements if you have the equipment or just use something and be happe when it happens to work ;-)
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16:43.33focusprobably right - I intend to check the 'normal' method and the original training - because I know original method worked without all these rules.
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16:55.03Welshon the subject of EOMA-68 and EOMA-CF, has anyone looked into where to get cases for the cards?
16:55.30focusLuke's repository had some datasheets from several makers I believe
16:56.01focushe probably knows them off by heart - if you ask in the arm-netbook mailing list
16:56.07WelshDo you know if they're available in very small quantities?
16:56.51WelshAnd where would the repo be?
16:56.55focusfarnell.com, mouser.com, digikey.com all do this kind of stuff - between them someone should have it
16:57.56focusrepo - memory weak - luke will know
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16:58.45focusbye
17:01.26focusfound it http://hands.com/~lkcl/   - bye
17:02.39WelshThanks
17:02.43Welshmouser has the cases too
17:09.52vinifmSPI_BC_REG in spi.h is a watermark to begin transmission?
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18:10.05bsdfox_are people using 3.4 for general use yet?
18:11.25mnemocyes
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18:20.19jelly-homemy generally idle A10 board runs it
18:42.49SPG05master 26e6aa9 06rhombus 03allwinner_a10/orders/angy.volin.mdwn * 14http://git.hands.com/?p=rhombus.git;a=commitdiff;h=26e6aa9
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19:01.18hramrachI run 3.4 also
19:01.34hramrachonly build and test A10 stuff on the board
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19:02.23TurlLinux mele 3.4.19+ #7 Tue Nov 27 01:29:47 UTC 2012 armv7l GNU/Linux
19:02.34Turlneed to update it one of these days
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19:07.03mnemocTurl: just 10 versions behind ;-)
19:07.28Turl:)
19:07.42TurlI'm using USB heavily on it
19:14.00mnemocwhy not the sata?
19:15.01Turlbecause my external disk I already owned is USB
19:16.25mnemoclame :)
19:16.47hramrachI use SD card
19:17.04hramrachdoes not stick out ;-)
19:17.19Turlon mele they do :|
19:18.03Turland the sd thingy doesn't have springs so it doesn't 'click' in
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19:18.50Turlmnemoc: my external USB disk also has a sleeping feature so it doesn't spin if there's no io :)
19:19.07hramrachthat's why it must stick out
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19:33.59pidpawelhi. I thought that you might know. ;) what could possibly gone wrong http://wklej.org/hash/0101f746cce/txt/ ?
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19:40.46Turlpidpawel: gentoo
19:40.59mnemoc*g*
19:41.05Turl:p
19:41.20pidpawelyes. gentoo :)
19:42.03TurlI guess my word selection wasn't optimal :p
19:45.03mnemocTurl: more words would have made it too explicit
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19:52.18SPG03Daniele 05master f36d991 06rhombus 03allwinner_a10/orders/faiko.mdwn * 14http://git.hands.com/?p=rhombus.git;a=commitdiff;h=f36d991
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20:10.56Maqshi
20:12.11Maqsandoma: anything new regarding showtime on a10? :-)
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20:58.36vinifmmnemoc: a patch needs to be tested before being submitted?
20:59.55Turlvinifm: submitting broken patches is not a very good practice :)
21:00.29vinifmwas what I thought :)
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21:01.58Turlat the very least make sure it compiles
21:02.23vinifmkkk :)
21:12.09mdptest by inspection ought to be good enough for anybody
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21:14.26ssvbpidpawel: try a different triplet, something like armv7a-hardfloat-linux-gnueabi
21:19.16pidpawelssvb: i forgot to tell. on #gentoo-embedded already told me this and it worked. however thanks ;)
21:20.45ssvbpidpawel: ok, hope everything else works just fine for you
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21:48.20andomaMaqs: i upgraded to latest sunxi-3.0 kernel and switched my userland to hardfloat
21:48.28andomalots of issues came up after that :(
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21:50.11mnemocandoma: can you try sunxi-v3.0.52-r2 instead of sunxi-3.0's head?
21:51.04andomawill do (when i get home). I'm away traveling atm.
21:51.37andomathe issues i have is basically that the framebuffer disp surface refuses to become transparent so when i add video "below" it the video is not visible
21:52.11andomaand i get a lot of errors (visible as blocking artifacts, incorrect colors) in video decoding as well
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