irclog2html for #openjtag on 20051022

02:13.48*** join/#openjtag ka6sox (n=ka6sox@nslu2-linux/ka6sox)
07:18.53*** join/#openjtag ep1220 (n=NN@gate.epatec.at)
07:59.29*** join/#openjtag ByronT (n=byron-po@nslu2-linux/ByronT)
08:24.55*** join/#openjtag odoc (i=odoc@is.borntobooze.de)
10:26.35*** join/#openjtag vmaster_ (i=vmaster@p549B5426.dip.t-dialin.net)
11:19.17lennertvmaster: when i come home from running i'd like to have a chat about your jtag proposal
11:19.24lennertvmaster: is today a good day/time?
11:19.35vmasterheh, as good as any other day/time
11:19.49lennertokay
11:20.07vmasterjust highlight me a bit when you're back :)
11:21.14lennertokay
11:21.21lennerti have http://mmd.ath.cx/epp_jtag/
11:21.29lennertand there's some other link you sent but i keep forgetting.. ?
11:23.11vmasteropenocd.berlios.de
11:23.23lennertthanks
11:23.28vmasterthe eppjtag is already a bit outdated, i.e. i know that it has a serious flaw
11:23.36lennertthe clock divider is fucked
11:24.04vmastermhh, maybe, but the parallel port interfacing is even worse ;)
11:24.36vmasterif tck goes below 1mhz or maybe 500khz, epp timesouts are going to occur
11:24.37lennertokay :)
11:24.43lennerthmm
11:24.48lennertdidn't look at it very carefully
11:24.54vmasterlaurent gauch from amontec started working on a new version
11:25.00vmasterwhich he's going to release with complete vhdl code
11:25.16vmasterbut i haven't heared from him the last two weeks
11:25.22lennertokay
11:25.29lennertis the protocol documented somewhere?
11:26.21vmasterepp?
11:26.30lennertno, the epp jtag thing
11:26.51vmasteruhm, on a piece of paper on my desk ;) - it's rather simple
11:27.31vmasterah, i guess i wrote about it in an email, i'll see if i can find it
11:27.55dyoung-awaythis is all so wonderful
11:28.30vmasterThere are three access methods:
11:28.30vmaster- Scan (EPP data write)
11:28.30vmaster- Write cfg (EPP address write)
11:28.31vmaster- Read Scan (EPP data read)
11:28.31vmasterThe configuration latch holds the number of bits to be scanned (cfg(2:0)),
11:28.33vmasterwhether the scan should go to TMS or TDI (cfg(3)), the desired clock divider
11:28.34lennertvmaster: great, thanks
11:28.35vmaster(cfg(5:4)), srst (cfg(6)) and trst (cfg(7)).
11:28.35lennertdyoung-away: what?
11:30.14lennertokay, that's indeed fairly simple
11:30.15dyoung-awayVHDL and stuff
11:30.34dyoung-awayI can almost wrap my tiny brain around it.
11:30.44dyoung-awayThe light bulb didnt quite go on yet.
11:30.48lennertvmaster: if the scan goes to TMS, TDI is a don't care, and if it goes to TDI, TMS is a zero?
11:31.06lennertdyoung-away: maybe it'll help to read the xst.pdf guide
11:31.18lennertdyoung-away: there are only a dozen patterns that you can make in vhdl that the synthesizer will recognise
11:31.19vmasterif a scan goes to TMS, TDI is Data(7)
11:31.37vmasterif a scan goes to TDI, TMS is zero
11:31.51vmasterbecause you want to stay in Shift-D/IR
11:32.03lennertok, so when you want to scan the last bit of the D/IR, you have to issue a scan to TMS
11:32.17vmasteryep
11:32.18lennert(because when you leave shift-dr/ir, the bit in tdi is still shifted in)
11:32.20lennertokay
11:32.32vmasterthat's the way it's handled on ft2232c for example
11:32.52lennertyeah, that doesn't sound hard to implement at all
11:33.24lennertdo the openwince jtag tools support this kind of interface?
11:33.28vmasterno
11:33.34lennertjust bit-banging?
11:33.58vmasteryes
11:34.35vmasterwhile it wouldn't be much of an effort to port them to that kind of interface, it would require a lot of work to port them to a high-latency interface like usb
11:34.51lennertparallel port is also fairly high latency
11:34.59lennertand the latency is going up with newer chipsets
11:35.20vmastermhh, yeah, but you can do epp accesses in microseconds
11:35.27vmasterusb accesses take miliseconds
11:35.49lennertshifing in a million bits takes 10 seconds on my work pc
11:36.03lennertso that's.. yeah, about 200 000 parallel port writes per second
11:36.25lennertabout 12000 processor clock cycles each
11:37.12vmasterwith the ft2232c, writing the data out takes <1ms, but waiting for the result takes >10ms
11:38.04lennertis that a chip quirk or something unfixable in the usb protocol?
11:38.18lennertof course, we can always make a jtag pci board ;)
11:39.53vmasterusb 1.1 transmits data in frames of 1ms length
11:39.55lennertmy home box does it much faster, about 4 seconds for the code download, but that's an older chipset
11:40.14lennertright, that sucks then
11:41.03vmasterusb 2.0 uses 125us frames, but there's no solution as easy as the ft2232c available
11:42.06vmasterthe latency isn't that much an issue when you design your application for high-latency operation
11:42.39lennertthe only case where we really care about both what we shift in and what we shift out is SAMPLE/EXTEST
11:42.58lennertso i.e. we issue a SAMPLE, shift out the sampled data while we shift in the new test vector, and issue EXTEST
11:43.09lennertbut with that parallel i/f, you can do that 8 bits at a time, right?
11:43.18vmasteryes
11:43.27lennertin theory we can do that in larger groups
11:43.41lennerti.e. we could just write the entire scan vector, and then read out the old scan vector
11:43.46lennertis there any other case where the latency matters?
11:44.00vmasteryes
11:44.07vmasterwhen debugging arm7/arm9 systems for example
11:44.27lennertcan you describe what the issue is there?
11:45.10vmasterokay, you write target memory by shifiting instructions into the pipeline that write the core registers, and an instruction that stores them to main memory afterwards
11:45.34vmasterafter that, you have to poll a special scan chain for an acknowledgment
11:45.54vmasterthe arm has 16 core registers, one has to be used as a base register, the last ist the program counter
11:45.54lennertright
11:46.01lennertyes
11:46.08lennertokay, that's annoying
11:46.11vmasterthat gives your 14 usable registers, or 56 bytes at a time, before having to wait
11:46.49lennertthere's something similar with xilinx fpga's in that you have to keep polling the IR after you program the chip and issue JSTART, because the IR has the 'done' bit
11:47.02lennertbut that's only once
11:47.44lennerthmmm
11:47.55vmasteron xc9500 cplds, you have to check the result of many writes, and enter an exception handling process if the result didn't match
11:47.58lennertthis kind of thing just makes you want to shift the control logic to the jtag interface instead of the host pc
11:48.57lennertwhich is also problematic
11:49.13vmasteryeah, you have a tradeoff between flexibility and performance
11:49.50vmastermpeforth has a nice usb arm-jtag debugger, but it's tailored to arm debugging - not much use for other tasks
11:50.07vmasterthey do all the work with an onboard arm7 uc
11:50.15lennertmakes sense
11:50.42lennertpci writes/reads are still thousands of cycles each, so that wouldn't even be very much faster than parallel
11:51.20vmasterpci would just allow you to do writes of more than 8bit, but that's not the order of magnitude we're looking for
11:53.20lennertthere's the 'long scan' case, where we benefit from burst writes, and the 'poll scan chain' case where we benefit from fast turnaround time
11:56.45vmasterideally, there's a sophisticated jtag interface/api that may be implemented completely in hardware, or partly in hardware and partly on the host pc
11:56.56vmaster*there'd be
11:57.56vmasterfor wigglers (which still many are going to use) or other bitbanging interfaces, this would be implemented by generic host software, while advanced devices could offload work to the hardware
11:58.08lennertyeah
11:58.19lennerti was thinking about converting my spartan3 loader to the epp interface you suggested
11:58.29lennertand then to write a shim layer to convert the epp stuff into bitbang stuff
11:58.35lennertepp->bitbang is trivial in software
11:58.39vmasteryep
11:58.49lennertso indeed, have the s/w speak some protocol that is latency-insensitive and offloadable
11:58.56lennertand then decide what you do in s/w and what you offload to h/w
11:59.01vmastersee my jtag api at openocd.berlios.de
11:59.03lennertokay, my running partner has arrived
11:59.11vmasterheh, cya later then
11:59.16lennerti will when i get back
11:59.19lennerti'm off for running now
11:59.23lennertbe back in ~1.5 hrs
11:59.26lennertciao :)
11:59.29lennertthanks for the conversation so far
12:54.12*** join/#openjtag Tiersten (i=tman@nslu2-linux/Tiersten)
13:03.15lennertok, back
13:03.31lennertneed a shower though
13:29.35vmasterwb
13:29.54lennertthanks
13:42.25*** join/#openjtag bullet (n=bullet@137.56.203.62.cust.bluewin.ch)
15:10.02*** join/#openjtag ka6sox (n=ka6sox@nslu2-linux/ka6sox)
15:10.10ka6soxep1220: ping?
15:10.38ep1220ka6sox: pong
15:10.48ka6soxhow goes it?
15:11.14ep1220the PCBs arrived yesterday, late afternoon.
15:11.23ka6soxexcellent.
15:11.31ep1220all parts i ordered are here as well
15:11.44ep1220just promsied to spend the weekend with the family
15:11.53ep1220so work has to wait till monday
15:11.58ep1220unless it rains tomorrow
15:12.09ka6soxfamily first....*unless it rains*
15:12.12ka6sox:)
15:12.19ep1220:-)
15:12.41ka6soxmy  4yr old should be waking up anytime soon.
15:13.39ep1220so he will want breakfeast ...
15:14.01ka6soxya...his mother is sleeping in today.
15:15.24ka6soxvmaster was worried about the speed of the drivers that are available for the ftdi parts...
15:17.13ep1220i did measure on Windos, and did not see more dealy than I expected due to USB
15:17.22ep1220on Linux I used libusb
15:17.42ep1220as i understood on datatransfers it directly calls into the OS driver
15:18.24ep1220but did no benchmarks
15:18.31ka6soxyes...
15:18.46ka6soxI don't think that there is a mpsse driver written yet.
15:19.37ep1220there is a lib_fdti (not by FTDIchip)  which supports JTAG and uses libusb as well
15:20.17ka6soxah...okay cool.
15:20.29ep1220when I looked into it  libusb team said they change API
15:20.43ka6soxk
15:20.53ep1220i did not feel comfortable having to support this lib-ftdi
15:21.04ep1220so i wrote my own layer
15:21.20ka6soxoh excellent
15:21.41ep1220Now i have same API on windos and Linux
15:21.51ka6soxthis is very good.
15:21.58vmasterah, nice
15:22.29ep1220there seem to be a few quirks in libusb regarding device detection
15:22.44vmastermhh, that's working fine for me
15:22.57vmasterbut performance aint that good, using libftdi as well as ftd2xx
15:23.20ka6soxso it maybe ftd2xx that is the issue
15:23.32ep1220on my system there were differences between what libusb detected and what usbview showed
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15:24.00ep1220at that time libusb had anounces anew version soon, so i did not investigate
15:24.18vmasterwith your own driver: do you use multi-threading?
15:24.23ep1220vmaster: were do You see the performance probs
15:24.27ep1220vmaster: no
15:25.30vmasteron ftd2xx (at least with the current version on a vanilla 2.6.13 kernel) there's a deadlock - FT_Read wont return, even though the data was received by the OS
15:25.59vmasterftdi support suggested to use FT_GetQueueStatus and a sleep, to wait until the data is there
15:26.03vmasterthat's a nightmare for latency
15:26.38vmasterwith libftdi, i had problem when writing too much data
15:27.09vmasterso i had to limit the amount of data, giving reduced throughput, as the latency is ~10ms
15:27.27vmasterftd2xx solves this by using multi-threading
15:27.43vmasterthey have one thread continously reading from Bulk-In
15:28.33ep1220i guess one has to be carefull when sending lots of data
15:28.56ep1220the chip writes out data slower than the it can receive data from USB
15:28.59vmastermhh, i guess it's rather about reading the data soon enough
15:29.18vmasterwhich is why libftdi fails, but ftd2xx not
15:29.46vmasterftd2xx initiates writes of 4096 byte, but libftdi would fail when i wrote ~700 byte
15:30.05vmasterthe only difference is that ftd2xx has concurrent reads
15:30.21vmasterunfortunately, libusb is synchronous, so you have to use another thread for reading
15:30.36vmasterand if you're not carefull enough with that, you get the deadlocks i'm experiencing with ftd2xx
15:30.48lennertforcing people to use blocking i/o is one of the things i hate
15:32.09vmasteri asked ftdi about some low-level information about the chip, but that was friday afternoon, and i guess they've already left for the weekend
15:36.22ep1220sorry, the family calls ..
15:36.55ka6soxbye!
15:36.58ka6soxhave fun.
15:37.06vmastercya
16:56.17lennertis there an easy way to find out whether an input pin is unconnected?  check whether it's randomly oscillating?
16:59.04vmastermhh, wouldn't it be technology dependant?
17:00.31lennertyup
17:00.56lennertdo non-cmos fpga's exist?
17:01.31vmasterheh, probably not
17:04.45lennertwhat's your opinion on openwince jtag stuff?
17:05.10ka6soxlennert, yes they do...but they are VERY expensive
17:06.07lennertka6sox: what's the point.. higher switching speed?
17:06.13ka6soxyes.
17:06.17ka6soxvery fast parts.
17:06.27lennerthigh power consumption
17:06.30ka6soxGHZ+ parts and RAD hard.
17:06.31lennertlow gate counts
17:06.36lennertwow, ghz+
17:07.16lennertgreat for implementing a fast arm core :P
17:08.26ka6soxthe ARM police might be out....
17:08.30lennerthehe
17:09.37lennerti wouldn't exactly call them police
17:09.58lennertpolice are supposed to fight for the good cause
17:10.43ka6soxyes indeed
17:11.26vmasteropenwince jtag seems to be written for a limited purpose
17:13.04ka6soxparallel wigglers on windows?
17:13.23vmasteruhm, windows and linux, but that's about it
17:13.57ka6soxthat is what was cheap.
17:13.57vmasterit just wont scale to anything else but low-performance boundary-scan flash writing
17:16.42lennertokay
17:16.49lennertso it's better not to bother with it?
17:17.04vmastermhh, what do you want to achieve?
17:17.19lennertone package that can do everything! :)
17:17.36vmasterheh, i may be biased, but i wouldn't bother with openwince then
17:19.02ka6soxI wouldn't bother with it..there are better starting places....
17:19.33ka6soxblack(something) looks better to me (another opensource jtag thingo)
17:19.37ka6sox(software)
17:20.12lennerti kind of have in my head what i want things to look like
17:20.35lennertbut if we start from scratch, there'll be Yet Another jtag tool out there
17:20.38lennertand we already have too many
17:22.19ka6soxlook for black(something) on freshmeat
17:25.16vmasterhmm... freshmeat only gives 6 hits on 'jtag', and nothing with black in it
17:25.41ka6soxjelie is interesting (as we are playing with Xscale devices)
17:27.22lennertjelie?
17:27.36vmasterjelie.org
17:27.40vmastera pxa250 debugger
17:27.43lennertoh
17:28.41lennertManuel de l'utilisateur (seulement en français)
17:28.44lennertthat's nice
18:32.17*** part/#openjtag odoc (i=odoc@is.borntobooze.de)
18:32.30*** join/#openjtag odoc (i=odoc@is.borntobooze.de)
19:49.01[g2]so are you guys following the cell phone hacking at all ?
19:59.05*** join/#openjtag bullet (n=bullet@137.56.203.62.cust.bluewin.ch)
20:53.47lennert[g2]: nope
20:56.37ka6soxthat is a BIG usage I hear of jtag...reprogramming the phones.
21:53.34*** part/#openjtag odoc (i=odoc@is.borntobooze.de)
21:59.44dyoung-awaylennert, vmaster, can you remind me what the file is that may  need twiddling for the Xserver to work with the webpack ?
22:01.57ka6soxtime for me to setup s3projects.org?
22:03.32dyoung-awayhttp://fjtag.sourceforge.net/ mght be of interest too
22:07.50ka6soxback in 30 minutes
23:14.45ka6soxdyoung-away: if I setup s3projects.org will you please help populate it?
23:15.33ka6sox(since I think its time for it to be setup :)
23:39.56lennertka6sox: okay
23:40.02lennertka6sox: i will help populate it
23:40.09lennertka6sox: i have a subversion tree with vhdl crap
23:40.18lennertdyoung-away: libXm.so.something and libcurl.so.2.0.2
23:40.45dyoung-awaylennert, I have those; the WindU thingo wasnt starting
23:41.09dyoung-awayI eventually found the right config file to hack out "nolisten" from
23:42.12lennertdyoung-away: /etc/X11/somewhere
23:42.44dyoung-awayit was /etc/kde3/kdm/kdmrc
23:43.40lennertah
23:43.44lennertdepends on which dm you use
23:43.47lennerti tend to use gdm

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