irclog2html for blob on 2001.10.25

irclog2html for blob on 2001.10.25 00:39:42 sammy hello ... 07:05:32 erikm morning 07:43:04 BZFlag morn. 07:43:32 BZFlag clock usage? I tried: clock 00000009 00c8993f cccccccf fffffffc ffffffff 07:43:52 BZFlag on the shannon, which I thought were the values that are compiled in, and it locks up. 07:45:30 BZFlag can those still be set in blob now that we are running in ram? 07:48:09 BZFlag wishes erikm would get his tux hooked up. ;-) 07:48:14 BZFlag nite all 08:18:27 erikm hi seletz 08:18:33 seletz hi 08:18:46 seletz Did you get my mail? 08:18:59 erikm yup 08:19:09 erikm the memsetup stuff looks sane 08:19:19 erikm btw, blob now also works on assabet 08:19:52 seletz ok, then well have to (force) platform people to put those #defines into the arch-spec header, right? 08:19:54 erikm when rewriting the stuff I forgot the code that enabled the RS232 driver 08:20:06 seletz doh! 08:20:10 seletz :) 08:20:18 erikm yeah, that was a real doh! 08:20:58 seletz well, i'll kill the #defines in memsetup-sa1110.S and put it into the assabet.h, ok? 08:20:59 erikm other interesting thing is that the assabet LED on GPIO 17 is default off 08:21:10 seletz ? 08:21:12 erikm wait 5 minutes please 08:21:25 seletz ok 08:21:29 erikm I made some minor changes to the assabet memory setup 08:21:56 seletz getting Strong Brownian Motion Producer 08:22:30 erikm got them from an assabet running redboot :) 08:23:01 erikm seletz: Strong Brownian Motion Producer == Braun espresso machine? 08:25:21 sammy ommm...hello guys, the assabet use which RAM type ? 08:25:50 erikm sammy: SDRAM 08:26:00 sammy because I set the puppy memsetup-sa1110.S as the same as assabet ... 08:26:17 sammy but sounds not work :-\ 08:26:38 erikm sammy: intel has a SDRAM configurator on their website 08:27:12 erikm sammy: so if you know the timings of your SDRAM chips, it will calculate the correct values for the registers 08:27:55 sammy oh ,My God , My SDRAM is not intel....SHXX 08:28:19 erikm sammy: that's OK, intel doesn't make SDRAM chips at all :) 08:30:25 sammy erikm : you say the timing of my SDRAM .... only I have is the SDRAM mark on the chip , how can I know that ? 08:30:56 erikm sammy: get the data sheet from the manufacturers website 08:31:18 sammy from that SDRAM ? 08:31:24 erikm sammy: yes 08:31:34 sammy ok , :-) 08:31:58 erikm sammy: you need: #rows, tck, CAS latency, tcrd, trp twr, and refresh time 08:33:45 sammy ok , 08:34:16 sammy and erikm , I am through the Jflash code for sa1100 .... 08:35:24 sammy and do you know is that Writing flash at hex address 280,18.32% done 08:35:43 sammy that hex address is that 0x00000280 ? 08:36:11 erikm yes, it's hex. it's a status update 08:36:31 sammy some flash address confuse me :-( 08:37:24 erikm it's just a status update so you know it is doing something 08:37:39 sammy Starting erase for da5 bytes da5=3493 08:38:12 sammy so erase always be calc by block ? 08:38:50 sammy but it actually it only 3493 bytes .... 08:39:34 sammy and I rewrite Jflash always stuck in check sa1110 ID ? why ? 08:43:16 sammy find that chip's data sheet 08:46:25 seletz back 08:55:36 erikm seletz go ahead, sa1110 setup code is commited 08:59:07 sammy find the data sheet ... 08:59:16 sammy start check out ... 09:09:34 seletz coding 10:10:47 sammy erikm: where is the calc wetsite ? intel sounds like not have that ? 10:22:16 sammy seletz : about your SDRAM , how do you set that ? 10:27:28 sammy I can't find it :-( 10:31:57 sammy erikm: where is the side you say ? 10:32:25 erikm sammy: it's *somewhere* on http://developer.intel.com/design/strong/ 10:34:39 erikm sammy: http://appzone.intel.com/hcd/sa1110/memory/index.asp 10:36:31 sammy ^_^ 10:46:55 erikm puts that URL in memsetup-sa1110.S 11:31:06 seletz erikm: are you there? 11:32:26 sammy seletz : what's type are your memory MSCn set ? 11:32:45 sammy Nonburst ROM or Flash memory ? 11:32:49 sammy or 11:33:31 seletz sammy: wait a while with this, i'll commit a new arch/system3.h with 11:33:49 seletz sammy: some defines in it. There you can have a look. 11:34:31 sammy SRAM for nCS 2:0 variable latency I/O for nCS 5:3 11:34:32 sammy SRAM for nCS 2:0 variable latency I/O for nCS 5:3 11:34:33 sammy SRAM for nCS 2:0 variable latency I/O for nCS 5:3 11:34:35 sammy SRAM for nCS 2:0 variable latency I/O for nCS 5:3 11:34:36 sammy ok ;-) 11:34:59 seletz sammy: /* Memory configuration */ 11:34:59 seletz #define MSC0_VALUE_66_150 MSC_RT_ROMFLASH | MSC_RBW32 | MSC_RDF(10) | MSC_RDN(2) | MSC_RRR(1) 11:34:59 seletz #define MSC0_VALUE_66_120 MSC_RT_ROMFLASH | MSC_RBW32 | MSC_RDF( 8) | MSC_RDN(2) | MSC_RRR(1) 11:34:59 seletz #define MSC0_VALUE_66_100 MSC_RT_ROMFLASH | MSC_RBW32 | MSC_RDF( 7) | MSC_RDN(2) | MSC_RRR(1) 11:34:59 seletz #define MSC1_VALUE_66 MSC_RT_ROMFLASH | MSC_RBW16 | MSC_RDF(5) | MSC_RDN(1) | MSC_RRR(1) | ((MSC_RT_VARLAT_345 | MSC_RBW16 | MSC_RDF(30) | MSC_RDN(30) | MSC_RRR(7))<<16) 11:35:00 seletz #define MSC2_VALUE_66 MSC_RT_VARLAT_345 | MSC_RBW32 | MSC_RDF(7) | MSC_RDN(2) | MSC_RRR(1) 11:35:03 seletz #define MECR_VALUE_66 0 11:35:04 seletz #define MSC0_VALUE_100_150 MSC_RT_ROMFLASH | MSC_RBW32 | MSC_RDF(16) | MSC_RDN(3) | MSC_RRR(2) 11:35:06 seletz #define MSC0_VALUE_100_120 MSC_RT_ROMFLASH | MSC_RBW32 | MSC_RDF(13) | MSC_RDN(3) | MSC_RRR(2) 11:35:09 seletz #define MSC0_VALUE_100_100 MSC_RT_ROMFLASH | MSC_RBW32 | MSC_RDF(11) | MSC_RDN(3) | MSC_RRR(2) 11:35:10 seletz #define MSC1_VALUE_100 MSC_RT_ROMFLASH | MSC_RBW16 | MSC_RDF(5) | MSC_RDN(1) | MSC_RRR(1)| ((MSC_RT_VARLAT_345 | MSC_RBW16 | MSC_RDF(30) | MSC_RDN(30) | MSC_RRR(7))<<16) 11:35:13 seletz #define MSC2_VALUE_100 MSC_RT_VARLAT_345 | MSC_RBW32 | MSC_RDF(9) | MSC_RDN(2) | MSC_RRR(1) 11:35:15 seletz #define MECR_VALUE_100 0 11:35:18 seletz :) 11:35:28 seletz the _100 values are for 206 Mhz 11:35:54 seletz we use 28x640 INTEL flashes 11:36:27 seletz which are 150 ns (msc0_100_150 11:37:37 seletz sammy: this defines are for static memory. For SDRAM you must not 11:37:53 seletz sammy: fill MDREFR, it is automatically set. 11:38:33 sammy if I use 28x128 Intel flash ram ? 11:39:05 seletz hmmm. That's assabet, isn't it? Im not into flashes yet, tough. :( 11:40:34 sammy ^_^ not ...it's this http://www.masteria.com.tw/frame02.htm 11:40:50 sammy but just alike ... 11:42:49 sammy tWP tCHZ in the memory data sheet , can't fine .... 11:43:13 sammy so I don't what to put the vaule (ns) for that >\? 11:43:27 seletz sammy: but just wait a while, i just want to get flash working with my board. If my board works, then i'll probably may be eventually able to help you :) 11:44:05 sammy ok....Good luck ..;-) 11:44:37 seletz hmm. tWP. Look it up in the sa1110 dev manual, "MDCNFG" is the magic word. 11:45:56 seletz or look into the kerlel source, in cpu-1100.c there is this value calculated for clock scaling support. 11:46:47 sammy ok 11:46:51 sammy thanx 12:11:10 seletz erikm: well, flash seems to work for me! 12:35:13 sammy seletz: what's your minicom speed for blob ? 12:35:57 sammy erikm: if I run blob still usr 9600 8N1 right ? 12:36:13 sammy .....still not work ? why ? 12:37:06 seletz 9k6 8n1 is right. 12:37:31 seletz which serial line do you use? look into configure.in foe USE_SERIALx 12:37:59 seletz do you have some LEDs to switch on/off via GPIO on your board? 12:38:24 seletz sammy? 12:38:38 sammy but so many LED on ... 12:38:58 sammy I don't know which one is right ? 12:39:19 seletz look at your definition of LED_GPIO 12:39:34 seletz should be in arch/your_platform.h 12:39:52 erikm seletz: cool! 12:40:08 erikm seletz: so the flash cleanup was ok. 12:40:20 seletz erikm: Ok and needed :)) 12:40:23 sammy recheck... 12:40:49 seletz erikm: i still have a little sanity problem with memsetup. 12:40:51 erikm seletz: it also works on the assabet. though some tweaking is till needed over there 12:41:29 seletz erikm: looked at my code, right? then you noticed that i put the defs in arch/platfor,h. 12:42:01 seletz erikm: thats the problem now. under c we include sometimes sa1100.h, which clashes with memsetup.h 12:42:47 erikm seletz: /me looks 12:42:55 seletz erikm: i try to get a sane solution, but it seems that we either have to rename every macro or use a different include file which gets _only_ include in assembly. 12:43:39 GiuseppeOttaviano hi! 12:43:58 seletz erikm: the names in questions are the XXX_RRR RDF RDN and the registers themseves. 12:44:44 seletz erikm: I got extremely upset because i cant find out just _why_ sa-1100.h from kernel will fail in assembly. 12:45:06 sammy SA1110 need to use serial 1 ? 12:45:23 erikm sammy: depends on your board 12:45:25 seletz sammy: depends. :) 12:45:41 sammy ok... 12:45:52 seletz sammy: use 1 or 3. try it. one never knows ... 12:46:45 seletz erikm: btw, PROBLEM == warning. Compiles fine. Its just bad style i think. :) 12:48:03 GiuseppeOttaviano Progresses with CreditLART? 12:49:39 erikm GiuseppeOttaviano: no 12:49:58 erikm GiuseppeOttaviano: more important projects go first 12:50:13 erikm seletz: did you already commit it to CVS? 12:50:17 GiuseppeOttaviano which are the more important projects? 12:51:35 seletz erikm: nah, no commit yet because of compiler warnings. should i ignore & commit anyway? 12:51:59 erikm seletz: hmm. could you cvs diff it and send me the diff? 12:52:29 seletz erikm: yes. which files? just the source? 12:54:32 erikm seletz: just run "cvs diff -u > file.diff" in the blob root directory and send me the file.diff 12:56:19 seletz erikm: done 12:56:41 erikm GiuseppeOttaviano: positioning hard- and software, more LARTs, bootloader, camera interface, etc. etc. etc. 12:57:25 erikm GiuseppeOttaviano: (and no, I don't go into details :) 12:57:46 GiuseppeOttaviano ok, I don't want the details :-) 12:57:59 GiuseppeOttaviano But I'm very interested to credit lart :-) 12:59:00 erikm GiuseppeOttaviano: we are as well, but at this point a bit less. problem is that there are other partners involved which always slows down things 12:59:33 GiuseppeOttaviano :-( 13:00:00 GiuseppeOttaviano Ok, I will wait. Is it supposed to cost less than lart? (SA1110 and SDRAM should cost less...) 13:32:58 seletz coding ffts and filters 13:34:36 sammy_ need to change the place and food and coffee .... 13:35:06 sammy_ see all later ^_^ 13:37:21 seletz sammy_: bye! 14:29:13 seletz erikm: i guess my email did not reach you yet? 14:30:31 seletz well, enough for today. 14:30:40 seletz bye! 20:21:39 Pahan A-a-a-a. 20:21:41 Pahan Blob! Generated by irclog2html.pl by Jeff Waugh - find it at freshmeat.net! Modified by Tim Riker to work with infobot logs, split per channel and by date, etc.

`00:39:42`	`sammy`	`hello ...`
`07:05:32`	`erikm`	`morning`
`07:43:04`	`BZFlag`	`morn.`
`07:43:32`	`BZFlag`	`clock usage? I tried: clock 00000009 00c8993f cccccccf fffffffc ffffffff`
`07:43:52`	`BZFlag`	`on the shannon, which I thought were the values that are compiled in, and it locks up.`
`07:45:30`	`BZFlag`	`can those still be set in blob now that we are running in ram?`
`07:48:09`	`BZFlag`	`wishes erikm would get his tux hooked up. ;-)`
`07:48:14`	`BZFlag`	`nite all`
`08:18:27`	`erikm`	`hi seletz`
`08:18:33`	`seletz`	`hi`
`08:18:46`	`seletz`	`Did you get my mail?`
`08:18:59`	`erikm`	`yup`
`08:19:09`	`erikm`	`the memsetup stuff looks sane`
`08:19:19`	`erikm`	`btw, blob now also works on assabet`
`08:19:52`	`seletz`	`ok, then well have to (force) platform people to put those #defines into the arch-spec header, right?`
`08:19:54`	`erikm`	`when rewriting the stuff I forgot the code that enabled the RS232 driver`
`08:20:06`	`seletz`	`doh!`
`08:20:10`	`seletz`	`:)`
`08:20:18`	`erikm`	`yeah, that was a real doh!`
`08:20:58`	`seletz`	`well, i'll kill the #defines in memsetup-sa1110.S and put it into the assabet.h, ok?`
`08:20:59`	`erikm`	`other interesting thing is that the assabet LED on GPIO 17 is default off`
`08:21:10`	`seletz`	`?`
`08:21:12`	`erikm`	`wait 5 minutes please`
`08:21:25`	`seletz`	`ok`
`08:21:29`	`erikm`	`I made some minor changes to the assabet memory setup`
`08:21:56`	`seletz`	`getting Strong Brownian Motion Producer`
`08:22:30`	`erikm`	`got them from an assabet running redboot :)`
`08:23:01`	`erikm`	`seletz: Strong Brownian Motion Producer == Braun espresso machine?`
`08:25:21`	`sammy`	`ommm...hello guys, the assabet use which RAM type ?`
`08:25:50`	`erikm`	`sammy: SDRAM`
`08:26:00`	`sammy`	`because I set the puppy memsetup-sa1110.S as the same as assabet ...`
`08:26:17`	`sammy`	`but sounds not work :-\`
`08:26:38`	`erikm`	`sammy: intel has a SDRAM configurator on their website`
`08:27:12`	`erikm`	`sammy: so if you know the timings of your SDRAM chips, it will calculate the correct values for the registers`
`08:27:55`	`sammy`	`oh ,My God , My SDRAM is not intel....SHXX`
`08:28:19`	`erikm`	`sammy: that's OK, intel doesn't make SDRAM chips at all :)`
`08:30:25`	`sammy`	`erikm : you say the timing of my SDRAM .... only I have is the SDRAM mark on the chip , how can I know that ?`
`08:30:56`	`erikm`	`sammy: get the data sheet from the manufacturers website`
`08:31:18`	`sammy`	`from that SDRAM ?`
`08:31:24`	`erikm`	`sammy: yes`
`08:31:34`	`sammy`	`ok , :-)`
`08:31:58`	`erikm`	`sammy: you need: #rows, tck, CAS latency, tcrd, trp twr, and refresh time`
`08:33:45`	`sammy`	`ok ,`
`08:34:16`	`sammy`	`and erikm , I am through the Jflash code for sa1100 ....`
`08:35:24`	`sammy`	`and do you know is that Writing flash at hex address 280,18.32% done`
`08:35:43`	`sammy`	`that hex address is that 0x00000280 ?`
`08:36:11`	`erikm`	`yes, it's hex. it's a status update`
`08:36:31`	`sammy`	`some flash address confuse me :-(`
`08:37:24`	`erikm`	`it's just a status update so you know it is doing something`
`08:37:39`	`sammy`	`Starting erase for da5 bytes da5=3493`
`08:38:12`	`sammy`	`so erase always be calc by block ?`
`08:38:50`	`sammy`	`but it actually it only 3493 bytes ....`
`08:39:34`	`sammy`	`and I rewrite Jflash always stuck in check sa1110 ID ? why ?`
`08:43:16`	`sammy`	`find that chip's data sheet`
`08:46:25`	`seletz`	`back`
`08:55:36`	`erikm`	`seletz go ahead, sa1110 setup code is commited`
`08:59:07`	`sammy`	`find the data sheet ...`
`08:59:16`	`sammy`	`start check out ...`
`09:09:34`	`seletz`	`coding`
`10:10:47`	`sammy`	`erikm: where is the calc wetsite ? intel sounds like not have that ?`
`10:22:16`	`sammy`	`seletz : about your SDRAM , how do you set that ?`
`10:27:28`	`sammy`	`I can't find it :-(`
`10:31:57`	`sammy`	`erikm: where is the side you say ?`
`10:32:25`	`erikm`	`sammy: it's somewhere on http://developer.intel.com/design/strong/`
`10:34:39`	`erikm`	`sammy: http://appzone.intel.com/hcd/sa1110/memory/index.asp`
`10:36:31`	`sammy`	`^_^`
`10:46:55`	`erikm`	`puts that URL in memsetup-sa1110.S`
`11:31:06`	`seletz`	`erikm: are you there?`
`11:32:26`	`sammy`	`seletz : what's type are your memory MSCn set ?`
`11:32:45`	`sammy`	`Nonburst ROM or Flash memory ?`
`11:32:49`	`sammy`	`or`
`11:33:31`	`seletz`	`sammy: wait a while with this, i'll commit a new arch/system3.h with`
`11:33:49`	`seletz`	`sammy: some defines in it. There you can have a look.`
`11:34:31`	`sammy`	`SRAM for nCS 2:0 variable latency I/O for nCS 5:3`
`11:34:32`	`sammy`	`SRAM for nCS 2:0 variable latency I/O for nCS 5:3`
`11:34:33`	`sammy`	`SRAM for nCS 2:0 variable latency I/O for nCS 5:3`
`11:34:35`	`sammy`	`SRAM for nCS 2:0 variable latency I/O for nCS 5:3`
`11:34:36`	`sammy`	`ok ;-)`
`11:34:59`	`seletz`	`sammy: /* Memory configuration */`
`11:34:59`	`seletz`	`#define MSC0_VALUE_66_150 MSC_RT_ROMFLASH \| MSC_RBW32 \| MSC_RDF(10) \| MSC_RDN(2) \| MSC_RRR(1)`
`11:34:59`	`seletz`	`#define MSC0_VALUE_66_120 MSC_RT_ROMFLASH \| MSC_RBW32 \| MSC_RDF( 8) \| MSC_RDN(2) \| MSC_RRR(1)`
`11:34:59`	`seletz`	`#define MSC0_VALUE_66_100 MSC_RT_ROMFLASH \| MSC_RBW32 \| MSC_RDF( 7) \| MSC_RDN(2) \| MSC_RRR(1)`
`11:34:59`	`seletz`	`#define MSC1_VALUE_66 MSC_RT_ROMFLASH \| MSC_RBW16 \| MSC_RDF(5) \| MSC_RDN(1) \| MSC_RRR(1) \| ((MSC_RT_VARLAT_345 \| MSC_RBW16 \| MSC_RDF(30) \| MSC_RDN(30) \| MSC_RRR(7))<<16)`
`11:35:00`	`seletz`	`#define MSC2_VALUE_66 MSC_RT_VARLAT_345 \| MSC_RBW32 \| MSC_RDF(7) \| MSC_RDN(2) \| MSC_RRR(1)`
`11:35:03`	`seletz`	`#define MECR_VALUE_66 0`
`11:35:04`	`seletz`	`#define MSC0_VALUE_100_150 MSC_RT_ROMFLASH \| MSC_RBW32 \| MSC_RDF(16) \| MSC_RDN(3) \| MSC_RRR(2)`
`11:35:06`	`seletz`	`#define MSC0_VALUE_100_120 MSC_RT_ROMFLASH \| MSC_RBW32 \| MSC_RDF(13) \| MSC_RDN(3) \| MSC_RRR(2)`
`11:35:09`	`seletz`	`#define MSC0_VALUE_100_100 MSC_RT_ROMFLASH \| MSC_RBW32 \| MSC_RDF(11) \| MSC_RDN(3) \| MSC_RRR(2)`
`11:35:10`	`seletz`	`#define MSC1_VALUE_100 MSC_RT_ROMFLASH \| MSC_RBW16 \| MSC_RDF(5) \| MSC_RDN(1) \| MSC_RRR(1)\| ((MSC_RT_VARLAT_345 \| MSC_RBW16 \| MSC_RDF(30) \| MSC_RDN(30) \| MSC_RRR(7))<<16)`
`11:35:13`	`seletz`	`#define MSC2_VALUE_100 MSC_RT_VARLAT_345 \| MSC_RBW32 \| MSC_RDF(9) \| MSC_RDN(2) \| MSC_RRR(1)`
`11:35:15`	`seletz`	`#define MECR_VALUE_100 0`
`11:35:18`	`seletz`	`:)`
`11:35:28`	`seletz`	`the _100 values are for 206 Mhz`
`11:35:54`	`seletz`	`we use 28x640 INTEL flashes`
`11:36:27`	`seletz`	`which are 150 ns (msc0_100_150`
`11:37:37`	`seletz`	`sammy: this defines are for static memory. For SDRAM you must not`
`11:37:53`	`seletz`	`sammy: fill MDREFR, it is automatically set.`
`11:38:33`	`sammy`	`if I use 28x128 Intel flash ram ?`
`11:39:05`	`seletz`	`hmmm. That's assabet, isn't it? Im not into flashes yet, tough. :(`
`11:40:34`	`sammy`	`^_^ not ...it's this http://www.masteria.com.tw/frame02.htm`
`11:40:50`	`sammy`	`but just alike ...`
`11:42:49`	`sammy`	`tWP tCHZ in the memory data sheet , can't fine ....`
`11:43:13`	`sammy`	`so I don't what to put the vaule (ns) for that >\?`
`11:43:27`	`seletz`	`sammy: but just wait a while, i just want to get flash working with my board. If my board works, then i'll probably may be eventually able to help you :)`
`11:44:05`	`sammy`	`ok....Good luck ..;-)`
`11:44:37`	`seletz`	`hmm. tWP. Look it up in the sa1110 dev manual, "MDCNFG" is the magic word.`
`11:45:56`	`seletz`	`or look into the kerlel source, in cpu-1100.c there is this value calculated for clock scaling support.`
`11:46:47`	`sammy`	`ok`
`11:46:51`	`sammy`	`thanx`
`12:11:10`	`seletz`	`erikm: well, flash seems to work for me!`
`12:35:13`	`sammy`	`seletz: what's your minicom speed for blob ?`
`12:35:57`	`sammy`	`erikm: if I run blob still usr 9600 8N1 right ?`
`12:36:13`	`sammy`	`.....still not work ? why ?`
`12:37:06`	`seletz`	`9k6 8n1 is right.`
`12:37:31`	`seletz`	`which serial line do you use? look into configure.in foe USE_SERIALx`
`12:37:59`	`seletz`	`do you have some LEDs to switch on/off via GPIO on your board?`
`12:38:24`	`seletz`	`sammy?`
`12:38:38`	`sammy`	`but so many LED on ...`
`12:38:58`	`sammy`	`I don't know which one is right ?`
`12:39:19`	`seletz`	`look at your definition of LED_GPIO`
`12:39:34`	`seletz`	`should be in arch/your_platform.h`
`12:39:52`	`erikm`	`seletz: cool!`
`12:40:08`	`erikm`	`seletz: so the flash cleanup was ok.`
`12:40:20`	`seletz`	`erikm: Ok and needed :))`
`12:40:23`	`sammy`	`recheck...`
`12:40:49`	`seletz`	`erikm: i still have a little sanity problem with memsetup.`
`12:40:51`	`erikm`	`seletz: it also works on the assabet. though some tweaking is till needed over there`
`12:41:29`	`seletz`	`erikm: looked at my code, right? then you noticed that i put the defs in arch/platfor,h.`
`12:42:01`	`seletz`	`erikm: thats the problem now. under c we include sometimes sa1100.h, which clashes with memsetup.h`
`12:42:47`	`erikm`	`seletz: /me looks`
`12:42:55`	`seletz`	`erikm: i try to get a sane solution, but it seems that we either have to rename every macro or use a different include file which gets _only_ include in assembly.`
`12:43:39`	`GiuseppeOttaviano`	`hi!`
`12:43:58`	`seletz`	`erikm: the names in questions are the XXX_RRR RDF RDN and the registers themseves.`
`12:44:44`	`seletz`	`erikm: I got extremely upset because i cant find out just _why_ sa-1100.h from kernel will fail in assembly.`
`12:45:06`	`sammy`	`SA1110 need to use serial 1 ?`
`12:45:23`	`erikm`	`sammy: depends on your board`
`12:45:25`	`seletz`	`sammy: depends. :)`
`12:45:41`	`sammy`	`ok...`
`12:45:52`	`seletz`	`sammy: use 1 or 3. try it. one never knows ...`
`12:46:45`	`seletz`	`erikm: btw, PROBLEM == warning. Compiles fine. Its just bad style i think. :)`
`12:48:03`	`GiuseppeOttaviano`	`Progresses with CreditLART?`
`12:49:39`	`erikm`	`GiuseppeOttaviano: no`
`12:49:58`	`erikm`	`GiuseppeOttaviano: more important projects go first`
`12:50:13`	`erikm`	`seletz: did you already commit it to CVS?`
`12:50:17`	`GiuseppeOttaviano`	`which are the more important projects?`
`12:51:35`	`seletz`	`erikm: nah, no commit yet because of compiler warnings. should i ignore & commit anyway?`
`12:51:59`	`erikm`	`seletz: hmm. could you cvs diff it and send me the diff?`
`12:52:29`	`seletz`	`erikm: yes. which files? just the source?`
`12:54:32`	`erikm`	`seletz: just run "cvs diff -u > file.diff" in the blob root directory and send me the file.diff`
`12:56:19`	`seletz`	`erikm: done`
`12:56:41`	`erikm`	`GiuseppeOttaviano: positioning hard- and software, more LARTs, bootloader, camera interface, etc. etc. etc.`
`12:57:25`	`erikm`	`GiuseppeOttaviano: (and no, I don't go into details :)`
`12:57:46`	`GiuseppeOttaviano`	`ok, I don't want the details :-)`
`12:57:59`	`GiuseppeOttaviano`	`But I'm very interested to credit lart :-)`
`12:59:00`	`erikm`	`GiuseppeOttaviano: we are as well, but at this point a bit less. problem is that there are other partners involved which always slows down things`
`12:59:33`	`GiuseppeOttaviano`	`:-(`
`13:00:00`	`GiuseppeOttaviano`	`Ok, I will wait. Is it supposed to cost less than lart? (SA1110 and SDRAM should cost less...)`
`13:32:58`	`seletz`	`coding ffts and filters`
`13:34:36`	`sammy_`	`need to change the place and food and coffee ....`
`13:35:06`	`sammy_`	`see all later ^_^`
`13:37:21`	`seletz`	`sammy_: bye!`
`14:29:13`	`seletz`	`erikm: i guess my email did not reach you yet?`
`14:30:31`	`seletz`	`well, enough for today.`
`14:30:40`	`seletz`	`bye!`
`20:21:39`	`Pahan`	`A-a-a-a.`
`20:21:41`	`Pahan`	`Blob!`