irclog2html for blob on 2001.10.25

00:39:42sammyhello ...
07:43:32BZFlagclock usage? I tried: clock 00000009 00c8993f cccccccf fffffffc ffffffff
07:43:52BZFlagon the shannon, which I thought were the values that are compiled in, and it locks up.
07:45:30BZFlagcan those still be set in blob now that we are running in ram?
07:48:09BZFlagwishes erikm would get his tux hooked up. ;-)
07:48:14BZFlagnite all
08:18:27erikmhi seletz
08:18:46seletzDid you get my mail?
08:19:09erikmthe memsetup stuff looks sane
08:19:19erikmbtw, blob now also works on assabet
08:19:52seletzok, then well have to (force) platform people to put those #defines into the arch-spec header, right?
08:19:54erikmwhen rewriting the stuff I forgot the code that enabled the RS232 driver
08:20:18erikmyeah, that was a real doh!
08:20:58seletzwell, i'll kill the #defines in memsetup-sa1110.S and put it into the assabet.h, ok?
08:20:59erikmother interesting thing is that the assabet LED on GPIO 17 is default off
08:21:12erikmwait 5 minutes please
08:21:29erikmI made some minor changes to the assabet memory setup
08:21:56seletzgetting Strong Brownian Motion Producer
08:22:30erikmgot them from an assabet running redboot :)
08:23:01erikmseletz: Strong Brownian Motion Producer == Braun espresso machine?
08:25:21sammyommm...hello guys, the assabet use which RAM  type ?
08:25:50erikmsammy: SDRAM
08:26:00sammybecause I set the puppy memsetup-sa1110.S as the same as assabet ...
08:26:17sammybut sounds not work  :-\
08:26:38erikmsammy: intel has a SDRAM configurator on their website
08:27:12erikmsammy: so if you know the timings of your SDRAM chips, it will calculate the correct values for the registers
08:27:55sammyoh ,My God , My SDRAM is not intel....SHXX
08:28:19erikmsammy: that's OK, intel doesn't make SDRAM chips at all :)
08:30:25sammyerikm : you say the timing of my SDRAM .... only I have is the SDRAM mark on the chip , how can I know that ?
08:30:56erikmsammy: get the data sheet from the manufacturers website
08:31:18sammyfrom that SDRAM ?
08:31:24erikmsammy: yes
08:31:34sammyok , :-)
08:31:58erikmsammy: you need: #rows, tck, CAS latency, tcrd, trp twr, and refresh time
08:33:45sammyok ,
08:34:16sammyand erikm , I am through the Jflash code for sa1100 ....
08:35:24sammyand do you know is that   Writing flash at hex address    280,18.32% done
08:35:43sammythat hex address is that 0x00000280 ?
08:36:11erikmyes, it's hex. it's a status update
08:36:31sammysome flash address confuse me :-(
08:37:24erikmit's just a status update so you know it is doing something
08:37:39sammyStarting erase for da5 bytes   da5=3493
08:38:12sammyso erase always be calc by block ?
08:38:50sammybut it actually it only 3493 bytes ....
08:39:34sammyand I rewrite Jflash always stuck in check sa1110 ID ? why ?
08:43:16sammyfind that chip's data sheet
08:55:36erikmseletz go ahead, sa1110 setup code is commited
08:59:07sammyfind the data sheet ...
08:59:16sammystart check out ...
10:10:47sammyerikm: where is the calc wetsite ? intel sounds like not have that ?
10:22:16sammyseletz : about your SDRAM , how do you set that ?
10:27:28sammyI can't find it :-(
10:31:57sammyerikm: where is the side you say ?
10:32:25erikmsammy: it's *somewhere* on
10:46:55erikmputs that URL in memsetup-sa1110.S
11:31:06seletzerikm: are you there?
11:32:26sammyseletz : what's type are your memory MSCn set ?
11:32:45sammyNonburst ROM or Flash memory ?
11:33:31seletzsammy: wait a while with this, i'll commit a new arch/system3.h with
11:33:49seletzsammy: some defines in it. There you can have a look.
11:34:31sammySRAM for nCS 2:0 variable latency I/O for nCS 5:3
11:34:32sammySRAM for nCS 2:0 variable latency I/O for nCS 5:3
11:34:33sammySRAM for nCS 2:0 variable latency I/O for nCS 5:3
11:34:35sammySRAM for nCS 2:0 variable latency I/O for nCS 5:3
11:34:36sammyok ;-)
11:34:59seletzsammy: /* Memory configuration */
11:34:59seletz#define MSC0_VALUE_66_150     MSC_RT_ROMFLASH | MSC_RBW32 | MSC_RDF(10) | MSC_RDN(2) | MSC_RRR(1)
11:34:59seletz#define MSC0_VALUE_66_120     MSC_RT_ROMFLASH | MSC_RBW32 | MSC_RDF( 8) | MSC_RDN(2) | MSC_RRR(1)
11:34:59seletz#define MSC0_VALUE_66_100     MSC_RT_ROMFLASH | MSC_RBW32 | MSC_RDF( 7) | MSC_RDN(2) | MSC_RRR(1)
11:34:59seletz#define MSC1_VALUE_66         MSC_RT_ROMFLASH | MSC_RBW16 | MSC_RDF(5)  | MSC_RDN(1) | MSC_RRR(1) | ((MSC_RT_VARLAT_345 | MSC_RBW16 | MSC_RDF(30)  | MSC_RDN(30) | MSC_RRR(7))<<16)
11:35:00seletz#define MSC2_VALUE_66         MSC_RT_VARLAT_345 | MSC_RBW32 | MSC_RDF(7)  | MSC_RDN(2) | MSC_RRR(1)
11:35:03seletz#define MECR_VALUE_66         0
11:35:04seletz#define MSC0_VALUE_100_150    MSC_RT_ROMFLASH | MSC_RBW32 | MSC_RDF(16) | MSC_RDN(3) | MSC_RRR(2)
11:35:06seletz#define MSC0_VALUE_100_120    MSC_RT_ROMFLASH | MSC_RBW32 | MSC_RDF(13) | MSC_RDN(3) | MSC_RRR(2)
11:35:09seletz#define MSC0_VALUE_100_100    MSC_RT_ROMFLASH | MSC_RBW32 | MSC_RDF(11) | MSC_RDN(3) | MSC_RRR(2)
11:35:10seletz#define MSC1_VALUE_100        MSC_RT_ROMFLASH | MSC_RBW16 | MSC_RDF(5)  | MSC_RDN(1) | MSC_RRR(1)| ((MSC_RT_VARLAT_345 | MSC_RBW16 | MSC_RDF(30)  | MSC_RDN(30) | MSC_RRR(7))<<16)
11:35:13seletz#define MSC2_VALUE_100        MSC_RT_VARLAT_345 | MSC_RBW32 | MSC_RDF(9)  | MSC_RDN(2) | MSC_RRR(1)
11:35:15seletz#define MECR_VALUE_100        0
11:35:28seletzthe _100 values are for 206 Mhz
11:35:54seletzwe use 28x640 INTEL flashes
11:36:27seletzwhich are 150 ns (msc0_100_150
11:37:37seletzsammy: this defines are for static memory. For SDRAM you must not
11:37:53seletzsammy: fill MDREFR, it is automatically set.
11:38:33sammyif I use 28x128 Intel flash ram ?
11:39:05seletzhmmm. That's assabet, isn't it? Im not into flashes yet, tough. :(
11:40:34sammy^_^ not's this
11:40:50sammybut just alike ...
11:42:49sammytWP tCHZ in the memory data sheet , can't fine ....
11:43:13sammyso I don't what to put the vaule (ns) for that >\?
11:43:27seletzsammy: but just wait a while, i just want to get flash working with my board. If my board works, then i'll probably may be eventually able to help you :)
11:44:05sammyok....Good luck ..;-)
11:44:37seletzhmm. tWP. Look it up in the sa1110 dev manual, "MDCNFG" is the magic word.
11:45:56seletzor look into the kerlel source, in cpu-1100.c there is this value calculated for clock scaling support.
12:11:10seletzerikm: well, flash seems to work for me!
12:35:13sammyseletz: what's your minicom speed for blob ?
12:35:57sammyerikm: if I run blob still usr 9600 8N1 right ?
12:36:13sammy.....still not work ? why ?
12:37:06seletz9k6 8n1 is right.
12:37:31seletzwhich serial line do you use? look into foe USE_SERIALx
12:37:59seletzdo you have some LEDs to switch on/off via GPIO on your board?
12:38:38sammybut so many LED on ...
12:38:58sammyI don't know which one is right ?
12:39:19seletzlook at your definition of LED_GPIO
12:39:34seletzshould be in arch/your_platform.h
12:39:52erikmseletz: cool!
12:40:08erikmseletz: so the flash cleanup was ok.
12:40:20seletzerikm: Ok and needed :))
12:40:49seletzerikm: i still have a little sanity problem with memsetup.
12:40:51erikmseletz: it also works on the assabet. though some tweaking is till needed over there
12:41:29seletzerikm: looked at my code, right? then you noticed that i put the defs in arch/platfor,h.
12:42:01seletzerikm: thats the problem now. under c we include sometimes sa1100.h, which clashes with memsetup.h
12:42:47erikmseletz: /me looks
12:42:55seletzerikm: i try to get a sane solution, but it seems that we either have to rename every macro or use a different include file which gets _only_ include in assembly.
12:43:58seletzerikm: the names in questions are the XXX_RRR RDF RDN and the registers themseves.
12:44:44seletzerikm: I got extremely upset because i cant find out just _why_ sa-1100.h from kernel will fail in assembly.
12:45:06sammySA1110 need to use serial 1 ?
12:45:23erikmsammy: depends on your board
12:45:25seletzsammy: depends. :)
12:45:52seletzsammy: use 1 or 3. try it. one never knows ...
12:46:45seletzerikm: btw, PROBLEM == warning. Compiles fine. Its just bad style i think. :)
12:48:03GiuseppeOttavianoProgresses with CreditLART?
12:49:39erikmGiuseppeOttaviano: no
12:49:58erikmGiuseppeOttaviano: more important projects go first
12:50:13erikmseletz: did you already commit it to CVS?
12:50:17GiuseppeOttavianowhich are the more important projects?
12:51:35seletzerikm: nah, no commit yet because of compiler warnings. should i ignore & commit anyway?
12:51:59erikmseletz: hmm. could you cvs diff it and send me the diff?
12:52:29seletzerikm: yes. which files? just the source?
12:54:32erikmseletz: just run "cvs diff -u > file.diff" in the blob root directory and send me the file.diff
12:56:19seletzerikm: done
12:56:41erikmGiuseppeOttaviano: positioning hard- and software, more LARTs, bootloader, camera interface, etc. etc. etc.
12:57:25erikmGiuseppeOttaviano: (and no, I don't go into details :)
12:57:46GiuseppeOttavianook, I don't want the details :-)
12:57:59GiuseppeOttavianoBut I'm very interested to credit lart :-)
12:59:00erikmGiuseppeOttaviano: we are as well, but at this point a bit less. problem is that there are other partners involved which always slows down things
13:00:00GiuseppeOttavianoOk, I will wait. Is it supposed to cost less than lart? (SA1110 and SDRAM should cost less...)
13:32:58seletzcoding ffts and filters
13:34:36sammy_need to change the place and food and coffee ....
13:35:06sammy_see all later ^_^
13:37:21seletzsammy_: bye!
14:29:13seletzerikm: i guess my email did not reach you yet?
14:30:31seletzwell, enough for today.

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